[Mesa-dev] [PATCH 01/13] i965: Factor out logic to build a send message instruction with indirect descriptor.

[Kenneth Graunke]

On Wednesday, March 11, 2015 07:25:14 PM Francisco Jerez wrote:
> "Pohjolainen, Topi" <topi.pohjolainen at intel.com> writes:
> > On Fri, Feb 27, 2015 at 05:34:44PM +0200, Francisco Jerez wrote:
> >> @@ -1218,17 +1198,6 @@ fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
> >>                                false /* header */,
> >>                                simd_mode,
> >>                                0);
> >> -      brw_inst_set_exec_size(p->brw, insn_or, BRW_EXECUTE_1);
> >> -      brw_inst_set_src1_reg_type(p->brw, insn_or, BRW_REGISTER_TYPE_UD);
> >> -      brw_set_src0(p, insn_or, addr);
> >> -      brw_set_dest(p, insn_or, addr);
> >> -
> >> -
> >> -      /* dst = send(offset, a0.0) */
> >> -      brw_inst *insn_send = brw_next_insn(p, BRW_OPCODE_SEND);
> >> -      brw_set_dest(p, insn_send, retype(dst, BRW_REGISTER_TYPE_UW));
> >
> > I'm just reading this through again and noticed that the destination type
> > changes here to BRW_REGISTER_TYPE_UD (set in brw_send_indirect_message()).
> 
> Ah, yes, that change is intentional.  The type being set to UW was a
> remnant from Gen4-5 times -- Those used to require the destination type
> of SEND to be W/UW when doing 16-wide (even if the message was actually
> writing dwords back...).  None of the codepaths modified in this patch
> (or in the rest of the series) should be executed on Gen4 or 5.
> 
> Anyway good catch. :)

I'm pretty sure this does still apply on Gen7 - notably, BLORP uses UW
destinations for SIMD16 sends, and I believe Paul Berry tracked actual
issues down to that.  BLORP only exists on Gen6+.

I also seem to recall Chris Forbes hitting an issue relating to that
which he and Paul fixed during XDC 2013.

CC'ing Chris and Matt in case they remember any details.
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