[Mesa-dev] [PATCH 5/9] i965/nir: Emit MUL + ADD for MAD on GEN <= 5

Connor Abbott cwabbott0 at gmail.com
Tue Mar 17 19:35:28 PDT 2015


Instead of doing this, I think it would be better to add something to
nir_shader_compiler_options and do it in nir_opt_algebraic, similar to
what Eric has already done for other things. I've seen some shaders
where we transform a mul + a series of adds into a series of mad's,
which is good on gen6+ (at the very least, we reduce sched
dependencies, and we may be able to eliminate the mul) but if we do
that and then just naively lower it back we'll get worse results than
we started with. Similar thing with the previous lrp patch.

On Tue, Mar 17, 2015 at 10:17 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index 5da8423..41f9ae2 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -1234,7 +1234,13 @@ fs_visitor::nir_emit_alu(nir_alu_instr *instr)
>        break;
>
>     case nir_op_ffma:
> -      inst = emit(MAD(result, op[2], op[1], op[0]));
> +      if (brw->gen >= 6) {
> +         inst = emit(MAD(result, op[2], op[1], op[0]));
> +      } else {
> +         fs_reg temp = vgrf(glsl_type::float_type);
> +         emit(MUL(temp, op[0], op[1]));
> +         inst = emit(ADD(result, temp, op[2]));
> +      }
>        inst->saturate = instr->dest.saturate;
>        break;
>
> --
> 2.3.2
>
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