[Mesa-dev] [PATCH 07/23] ir_to_mesa: Add support for ir_triop_csel

[Ian Romanick]

From: Ian Romanick <ian.d.romanick at intel.com>

The only drivers that use this path are i915 and swrast.  Both of these
support the CMP opcode.  This is untested, but it is similar to existing
code in st_glsl_to_tgsi.cpp.

Without this change, a later commits "glsl: Distribute multiply over
b2f" and "glsl: Optimize certain if-statements to ir_triop_csel" will
cause assertion failures in ir_to_mesa.

Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
---
 src/mesa/program/ir_to_mesa.cpp | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 39790ec..b7acbfa 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1426,6 +1426,14 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
       emit(ir, OPCODE_LRP, result_dst, op[2], op[1], op[0]);
       break;
 
+   case ir_triop_csel:
+      /* We assume that Boolean true and false are 1.0 and 0.0.  OPCODE_CMP
+       * selects src1 if src0 is < 0, src2 otherwise.
+       */
+      op[0].negate = ~op[0].negate;
+      emit(ir, OPCODE_CMP, result_dst, op[0], op[1], op[2]);
+      break;
+
    case ir_binop_vector_extract:
    case ir_binop_bfm:
    case ir_triop_fma:
@@ -1434,7 +1442,6 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
    case ir_triop_vector_insert:
    case ir_quadop_bitfield_insert:
    case ir_binop_ldexp:
-   case ir_triop_csel:
    case ir_binop_carry:
    case ir_binop_borrow:
    case ir_binop_imul_high:
-- 
2.1.0