[Mesa-dev] [PATCH 17/18] i965/cs: Add max_cs_threads

[Ben Widawsky]

On Sat, Mar 14, 2015 at 09:54:27PM -0700, Jordan Justen wrote:
> Add some values for gen7 & gen8. These are the number threads in a
> subslice.
> 
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> Cc: Ben Widawsky <ben at bwidawsk.net>
> Cc: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/brw_context.c     | 1 +
>  src/mesa/drivers/dri/i965/brw_context.h     | 1 +
>  src/mesa/drivers/dri/i965/brw_device_info.c | 7 ++++++-
>  src/mesa/drivers/dri/i965/brw_device_info.h | 1 +
>  4 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
> index 0881e48..78e162e 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -822,6 +822,7 @@ brwCreateContext(gl_api api,
>     brw->max_ds_threads = devinfo->max_ds_threads;
>     brw->max_gs_threads = devinfo->max_gs_threads;
>     brw->max_wm_threads = devinfo->max_wm_threads;
> +   brw->max_cs_threads = devinfo->max_cs_threads;
>     brw->urb.size = devinfo->urb.size;
>     brw->urb.min_vs_entries = devinfo->urb.min_vs_entries;
>     brw->urb.max_vs_entries = devinfo->urb.max_vs_entries;
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index 27a4ff4..c4fc363 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1217,6 +1217,7 @@ struct brw_context
>     int max_ds_threads;
>     int max_gs_threads;
>     int max_wm_threads;
> +   int max_cs_threads;

I'd be in favor of calling this "compute" since "cs" is already a fairly common
term used within our GPU... up to you.

>  
>     /* BRW_NEW_URB_ALLOCATIONS:
>      */
> diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c b/src/mesa/drivers/dri/i965/brw_device_info.c
> index c4350b4..87e9746 100644
> --- a/src/mesa/drivers/dri/i965/brw_device_info.c
> +++ b/src/mesa/drivers/dri/i965/brw_device_info.c
> @@ -135,6 +135,7 @@ static const struct brw_device_info brw_device_info_ivb_gt2 = {
>     .max_ds_threads = 128,
>     .max_gs_threads = 128,
>     .max_wm_threads = 172,
> +   .max_cs_threads = 64, /* threads/subslice */
>     .urb = {
>        .size = 256,
>        .min_vs_entries = 32,

Where's IVB gt1? The docs are kind of sparse, but it seems to me,
GT1: 6 * 6 = 36
GT2: 8 * 6 = 48

> @@ -171,6 +172,7 @@ static const struct brw_device_info brw_device_info_hsw_gt1 = {
>     .max_ds_threads = 70,
>     .max_gs_threads = 70,
>     .max_wm_threads = 102,
> +   .max_cs_threads = 70, /* threads/subslice */
>     .urb = {
>        .size = 128,
>        .min_vs_entries = 32,
> @@ -188,6 +190,7 @@ static const struct brw_device_info brw_device_info_hsw_gt2 = {
>     .max_ds_threads = 280,
>     .max_gs_threads = 256,
>     .max_wm_threads = 204,
> +   .max_cs_threads = 70, /* threads/subslice */
>     .urb = {
>        .size = 256,
>        .min_vs_entries = 64,
> @@ -205,6 +208,7 @@ static const struct brw_device_info brw_device_info_hsw_gt3 = {
>     .max_ds_threads = 280,
>     .max_gs_threads = 256,
>     .max_wm_threads = 408,
> +   .max_cs_threads = 70, /* threads/subslice */
>     .urb = {
>        .size = 512,
>        .min_vs_entries = 64,

HSW looks right.

> @@ -225,7 +229,8 @@ static const struct brw_device_info brw_device_info_hsw_gt3 = {
>     .max_hs_threads = 504,                           \
>     .max_ds_threads = 504,                           \
>     .max_gs_threads = 504,                           \
> -   .max_wm_threads = 384                            \
> +   .max_wm_threads = 384,                           \
> +   .max_cs_threads = 56 /* threads/subslice */

I think this is wrong for GT1, if such a thing exists (should be 42).

>  
>  static const struct brw_device_info brw_device_info_bdw_gt1 = {
>     GEN8_FEATURES, .gt = 1,
> diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h b/src/mesa/drivers/dri/i965/brw_device_info.h
> index 7c9f5d0..6b4e168 100644
> --- a/src/mesa/drivers/dri/i965/brw_device_info.h
> +++ b/src/mesa/drivers/dri/i965/brw_device_info.h
> @@ -70,6 +70,7 @@ struct brw_device_info
>     unsigned max_ds_threads;
>     unsigned max_gs_threads;
>     unsigned max_wm_threads;
> +   unsigned max_cs_threads;
>  
>     struct {
>        unsigned size;

You're missing BYT, BSW, and SKL. I think it's fine to not implement them until
they're well tested, but maybe you could at least set a conservative default for
them?