[Mesa-dev] [PATCH 07/23] i965/gen9: Handle YF/YS tiling in intel_miptree_create()
Anuj Phogat
anuj.phogat at gmail.com
Mon Mar 30 14:04:38 PDT 2015
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index fac7b8e..ef6ff11 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -529,7 +529,12 @@ intel_miptree_create(struct brw_context *brw,
if (mt->tiling == (I915_TILING_Y | I915_TILING_X)) {
y_or_x = true;
- mt->tiling = I915_TILING_Y;
+ if (mt->tr_mode == INTEL_MIPTREE_TRMODE_NONE)
+ mt->tiling = I915_TILING_Y;
+ else if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YF)
+ mt->tiling = I915_TILING_YF;
+ else if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YS)
+ mt->tiling = I915_TILING_YS;
}
unsigned long pitch;
@@ -546,6 +551,7 @@ intel_miptree_create(struct brw_context *brw,
* handle Y-tiling, so we need to fall back to X.
*/
if (brw->gen < 6 && y_or_x && mt->bo->size >= brw->max_gtt_map_object_size) {
+ assert(mt->tr_mode == INTEL_MIPTREE_TRMODE_NONE);
perf_debug("%dx%d miptree larger than aperture; falling back to X-tiled\n",
mt->total_width, mt->total_height);
--
2.3.4
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