[Mesa-dev] [PATCH 18/23] i965/gen9: Use _mesa_meta_pbo_GetTexSubImage() to read YF/YS tiled textures
Anuj Phogat
anuj.phogat at gmail.com
Mon Mar 30 14:04:49 PDT 2015
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
---
src/mesa/drivers/dri/i965/intel_tex_image.c | 28 ++++++++++++++++++++--------
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 03db100..8e845c6 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -498,19 +498,31 @@ intel_get_tex_image(struct gl_context *ctx,
struct gl_texture_image *texImage) {
struct brw_context *brw = brw_context(ctx);
bool ok;
+ bool create_pbo = false;
+ uint32_t tr_mode = INTEL_MIPTREE_TRMODE_NONE;
DBG("%s\n", __FUNCTION__);
- if (_mesa_is_bufferobj(ctx->Pack.BufferObj)) {
- if (_mesa_meta_pbo_GetTexSubImage(ctx, 3, texImage, 0, 0, 0,
- texImage->Width, texImage->Height,
- texImage->Depth, format, type,
- pixels, false /* create_pbo */,
- false /*for_readpixels*/, &ctx->Pack))
- return;
+ if (brw->gen >= 9) {
+ struct intel_texture_image *intelImage = intel_texture_image(texImage);
+ tr_mode = intelImage->mt->tr_mode;
+ create_pbo = intelImage->mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE;
+ }
+
+ if (_mesa_meta_pbo_GetTexSubImage(ctx, 3, texImage, 0, 0, 0,
+ texImage->Width, texImage->Height,
+ texImage->Depth, format, type,
+ pixels, create_pbo,
+ false /*for_readpixels*/, &ctx->Pack))
+ return;
+
+ /* Currently there are no fallback paths to read data from surfaces with
+ * tr_mode != INTEL_MIPTREE_TRMODE_NONE.
+ */
+ assert(tr_mode == INTEL_MIPTREE_TRMODE_NONE);
+ if (_mesa_is_bufferobj(ctx->Pack.BufferObj))
perf_debug("%s: fallback to CPU mapping in PBO case\n", __FUNCTION__);
- }
ok = intel_gettexsubimage_tiled_memcpy(ctx, texImage, 0, 0,
texImage->Width, texImage->Height,
--
2.3.4
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