[Mesa-dev] [PATCH 00/23] i965/skl: Add YF/YS tiling support

[Anuj Phogat]

On Mon, Mar 30, 2015 at 2:42 PM, Matt Turner <mattst88 at gmail.com> wrote:
> On Mon, Mar 30, 2015 at 2:04 PM, Anuj Phogat <anuj.phogat at gmail.com> wrote:
>> This series enables skl+ to read/write data to YF/YF tiled
>> surfaces. Many piglit tests for texture/buffer data read/write
>> pass with the new tiling formats. I'm currently debugging an
>> issue about incorrect data getting uploaded to miplevels > 0.
>> I thought it'll useful to get some review comments while I work
>> on fixing the piglit regressions.
>>
>> Note: My drm patches posted on intel-gfx are required to build
>> this series.
>>
>> Patches are available at:
>> https://github.com/aphogat/drm.git, branch: tiling-yf-ys
>> https://github.com/aphogat/mesa.git, branch: tiling-yf-ys
>>
>> Anuj Phogat (18):
>>   meta: Enable _mesa_meta_pbo_GetTexSubImage() to read in to non-pbo
>>     buffers
>>   i965: Pass miptree pointer as function parameter in
>>     intel_vertical_texture_alignment_unit
>>   i965/gen9: Set tiled resource mode for the miptree
>>   i965/gen9: Handle YF/YS tiling in intel_miptree_create()
>>   i965/gen9: Set horizontal alignment for the miptree
>>   i965/gen9: Use HALIGN_16 if MCS is enabled
>>   i965/gen9: Set vertical alignment for the miptree
>>   i965/gen9: Handle YF/YS tiling cases in surface state
>>   i965: Rename use_linear_1d_layout() and make it global
>>   i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*
>>   i965/gen9: Use _mesa_meta_pbo_TexSubImage to upload data to YF/YS
>>     tiled surfaces
>>   i965/gen9: Use _mesa_meta_pbo_GetTexSubImage() to read YF/YS tiled
>>     buffers
>>   i965/gen9: Use _mesa_meta_pbo_GetTexSubImage() to read YF/YS tiled
>>     textures
>>   i965/gen9: Add XY_FAST_COPY_BLT support to intelEmitCopyBlit()
>>   i965/skl: Modify the conditions to use blitter on skl+
>>   i965/gen9: Use blitter as fallback path to read write YF/YS surfaces
>>   i965/gen9: Enable the use of YF/YS tiling on skl+
>>   i965/gen9: Disable Mip Tail for YF/YS tiled surfaces
>>
>> Anuj phogat (5):
>
> Heh, probably want to fix the capitalization of your last name before
> these get committed.
>
I was wondering why the cover letter shows the patches as two sets.
I'll fix it.

>>   i965: Choose tiling in brw_miptree_layout() function
>>   i965: Move intel_miptree_choose_tiling() to brw_tex_layout.c
>>   i965: Create a helper function intel_miptree_total_width_height()
>>   i965/gen9: Set tiled resource mode in surface state
>>   i965/gen9: Set vertical and horizontal surface alignments
>>
>>  src/mesa/drivers/common/meta.h                 |   1 +
>>  src/mesa/drivers/common/meta_tex_subimage.c    |  45 ++-
>>  src/mesa/drivers/dri/i965/brw_context.h        |   4 +
>>  src/mesa/drivers/dri/i965/brw_defines.h        |  11 +
>>  src/mesa/drivers/dri/i965/brw_tex_layout.c     | 444 ++++++++++++++++++++++---
>>  src/mesa/drivers/dri/i965/gen8_surface_state.c |  71 +++-
>>  src/mesa/drivers/dri/i965/intel_blit.c         | 293 +++++++++++++---
>>  src/mesa/drivers/dri/i965/intel_blit.h         |   3 +
>>  src/mesa/drivers/dri/i965/intel_copy_image.c   |   3 +
>>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c  | 147 ++------
>>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h  |  17 +-
>>  src/mesa/drivers/dri/i965/intel_pixel_read.c   |  22 +-
>>  src/mesa/drivers/dri/i965/intel_reg.h          |  33 ++
>>  src/mesa/drivers/dri/i965/intel_tex_image.c    |  36 +-
>>  14 files changed, 900 insertions(+), 230 deletions(-)
>>
>> --
>> 2.3.4