[Mesa-dev] [PATCH 01/25] i965: Add register constructors taking a backend_reg as argument.
Francisco Jerez
currojerez at riseup.net
Tue May 5 14:48:08 PDT 2015
These are going to be used to convert an array_reg (chunk of the
register space without fancy regioning parameters) back to a normal
FS/VEC4 register.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++++++
src/mesa/drivers/dri/i965/brw_ir_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_ir_vec4.h | 2 ++
src/mesa/drivers/dri/i965/brw_vec4.cpp | 10 ++++++++++
4 files changed, 19 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5fcd461..889079b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -606,6 +606,12 @@ fs_reg::fs_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3)
(vf3 << 24);
}
+fs_reg::fs_reg(const backend_reg ®, unsigned width) :
+ backend_reg(reg), subreg_offset(0), reladdr(NULL),
+ width(width), effective_width(0), stride(1)
+{
+}
+
/** Fixed brw_reg. */
fs_reg::fs_reg(struct brw_reg fixed_hw_reg)
{
diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index 66093f4..1f261dd 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h
@@ -41,6 +41,7 @@ public:
explicit fs_reg(uint32_t u);
explicit fs_reg(uint8_t vf[4]);
explicit fs_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3);
+ fs_reg(const backend_reg ®, unsigned width);
fs_reg(struct brw_reg fixed_hw_reg);
fs_reg(enum register_file file, int reg);
fs_reg(enum register_file file, int reg, enum brw_reg_type type);
diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
index bd97a1a..c53b1f8 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
@@ -46,6 +46,7 @@ public:
src_reg(int32_t i);
src_reg(uint8_t vf[4]);
src_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3);
+ src_reg(const backend_reg ®, unsigned swizzle);
src_reg(struct brw_reg reg);
bool equals(const src_reg &r) const;
@@ -113,6 +114,7 @@ public:
dst_reg(register_file file, int reg);
dst_reg(register_file file, int reg, const glsl_type *type,
unsigned writemask);
+ dst_reg(const backend_reg ®, unsigned writemask);
dst_reg(struct brw_reg reg);
dst_reg(class vec4_visitor *v, const struct glsl_type *type);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index a8d0e4a..936c926 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -138,6 +138,11 @@ src_reg::src_reg(const dst_reg ®)
this->swizzle = brw_swizzle_for_mask(reg.writemask);
}
+src_reg::src_reg(const backend_reg ®, unsigned swizzle) :
+ backend_reg(reg), swizzle(swizzle), reladdr(NULL)
+{
+}
+
void
dst_reg::init()
{
@@ -170,6 +175,11 @@ dst_reg::dst_reg(register_file file, int reg, const glsl_type *type,
this->writemask = writemask;
}
+dst_reg::dst_reg(const backend_reg ®, unsigned writemask) :
+ backend_reg(reg), writemask(writemask), reladdr(NULL)
+{
+}
+
dst_reg::dst_reg(struct brw_reg reg)
{
init();
--
2.3.5
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