[Mesa-dev] [PATCH v2 07/15] i965/fs: Make LOAD_PAYLOAD take a header size
Jason Ekstrand
jason at jlekstrand.net
Tue May 5 18:28:10 PDT 2015
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +++++-
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 20 +++++++++++---------
4 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 2a38854..b4528eb 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -355,8 +355,12 @@ fs_visitor::CMP(fs_reg dst, fs_reg src0, fs_reg src1,
}
fs_inst *
-fs_visitor::LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources)
+fs_visitor::LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources,
+ int header_size)
{
+ for (int i = 0; i < header_size; i++)
+ assert(src[i].file != GRF || src[i].width * type_sz(src[i].type) == 32);
+
uint8_t exec_size = dst.width;
for (int i = 0; i < sources; ++i) {
assert(src[i].width % dst.width == 0);
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index d514fa1..30cefe4 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -188,7 +188,8 @@ public:
fs_inst *end,
const fs_reg ®);
- fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
+ fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources,
+ int header_size);
exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
const fs_reg &surf_index,
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index fc19e0f..a582e6a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -181,7 +181,8 @@ create_copy_instr(fs_visitor *v, fs_inst *inst, fs_reg src, bool negate)
fs_reg *sources = ralloc_array(v->mem_ctx, fs_reg, written / dst_width);
for (int i = 0; i < written / dst_width; i++)
sources[i] = offset(src, i);
- copy = v->LOAD_PAYLOAD(dst, sources, written / dst_width);
+ copy = v->LOAD_PAYLOAD(dst, sources, written / dst_width,
+ inst->header_size);
} else {
copy = v->MOV(dst, src);
copy->force_writemask_all = inst->force_writemask_all;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index e0a97d5..813df22 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2003,7 +2003,7 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
fs_reg src_payload = fs_reg(GRF, alloc.allocate(mlen),
BRW_REGISTER_TYPE_F);
- emit(LOAD_PAYLOAD(src_payload, sources, length));
+ emit(LOAD_PAYLOAD(src_payload, sources, length, header_size));
/* Generate the SEND */
enum opcode opcode;
@@ -2170,7 +2170,7 @@ fs_visitor::emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler)
coordinate = offset(coordinate, 1);
}
- emit(LOAD_PAYLOAD(payload, sources, components));
+ emit(LOAD_PAYLOAD(payload, sources, components, 0));
fs_inst *inst = emit(SHADER_OPCODE_TXF_MCS, dest, payload, sampler);
inst->base_mrf = -1;
@@ -2280,7 +2280,7 @@ fs_visitor::emit_texture(ir_texture_opcode op,
fixed_payload[i] = offset(dst, i);
}
}
- emit(LOAD_PAYLOAD(dst, fixed_payload, components));
+ emit(LOAD_PAYLOAD(dst, fixed_payload, components, 0));
}
swizzle_result(op, dest_type->vector_elements, dst, sampler);
@@ -3296,7 +3296,7 @@ fs_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
int mlen = 1 + (length - 1) * reg_width;
fs_reg src_payload = fs_reg(GRF, alloc.allocate(mlen),
BRW_REGISTER_TYPE_UD);
- emit(LOAD_PAYLOAD(src_payload, sources, length));
+ emit(LOAD_PAYLOAD(src_payload, sources, length, 1));
/* Emit the instruction. */
fs_inst *inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst, src_payload,
@@ -3344,7 +3344,7 @@ fs_visitor::emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
int mlen = 1 + reg_width;
fs_reg src_payload = fs_reg(GRF, alloc.allocate(mlen),
BRW_REGISTER_TYPE_UD);
- fs_inst *inst = emit(LOAD_PAYLOAD(src_payload, sources, 2));
+ fs_inst *inst = emit(LOAD_PAYLOAD(src_payload, sources, 2, 1));
/* Emit the instruction. */
inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ, dst, src_payload,
@@ -3727,7 +3727,7 @@ fs_visitor::emit_single_fb_write(fs_reg color0, fs_reg color1,
brw_wm_prog_key *key = (brw_wm_prog_key*) this->key;
this->current_annotation = "FB write header";
- int header_size = 2;
+ int header_size = 2, payload_header_size;
int reg_size = exec_size / 8;
/* We can potentially have a message length of up to 15, so we have to set
@@ -3777,6 +3777,8 @@ fs_visitor::emit_single_fb_write(fs_reg color0, fs_reg color1,
length++;
}
+ payload_header_size = length;
+
if (color0.file == BAD_FILE) {
/* Even if there's no color buffers enabled, we still need to send
* alpha out the pipeline to our null renderbuffer to support
@@ -3837,7 +3839,7 @@ fs_visitor::emit_single_fb_write(fs_reg color0, fs_reg color1,
if (devinfo->gen >= 7) {
/* Send from the GRF */
fs_reg payload = fs_reg(GRF, -1, BRW_REGISTER_TYPE_F);
- load = emit(LOAD_PAYLOAD(payload, sources, length));
+ load = emit(LOAD_PAYLOAD(payload, sources, length, payload_header_size));
payload.reg = alloc.allocate(load->regs_written);
payload.width = dispatch_width;
load->dst = payload;
@@ -3846,7 +3848,7 @@ fs_visitor::emit_single_fb_write(fs_reg color0, fs_reg color1,
} else {
/* Send from the MRF */
load = emit(LOAD_PAYLOAD(fs_reg(MRF, 1, BRW_REGISTER_TYPE_F),
- sources, length));
+ sources, length, payload_header_size));
write = emit(FS_OPCODE_FB_WRITE);
write->exec_size = exec_size;
write->base_mrf = 1;
@@ -4149,7 +4151,7 @@ fs_visitor::emit_urb_writes()
payload_sources[0] = dummy;
memcpy(&payload_sources[1], sources, length * sizeof sources[0]);
- emit(LOAD_PAYLOAD(payload, payload_sources, length + 1));
+ emit(LOAD_PAYLOAD(payload, payload_sources, length + 1, 1));
inst = emit(SHADER_OPCODE_URB_WRITE_SIMD8, reg_undef, payload);
inst->eot = last;
--
2.3.6
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