[Mesa-dev] [PATCH] i965/fs: set execution size to 8 with simd8 ddy instruction

Tapani Pälli tapani.palli at intel.com
Tue May 12 04:24:08 PDT 2015

Commit dd5c825 changed the way how execution size for instructions
get set. Previously it was based on destination register width, now
it is set explicitly when emitting instructions.

Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90258
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index ba2a12f..5ccb00c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -928,6 +928,7 @@ fs_generator::generate_ddy(enum opcode opcode,
       brw_set_default_access_mode(p, BRW_ALIGN_16);
       if (unroll_to_simd8) {
          brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
+         brw_set_default_exec_size(p, BRW_EXECUTE_8);
          if (negate_value) {
             brw_ADD(p, firsthalf(dst), firsthalf(src1), negate(firsthalf(src0)));
             brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);

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