[Mesa-dev] [PATCH] i965/fs: Combine the fs_visitor constructors.
Jordan Justen
jordan.l.justen at intel.com
Tue May 12 21:23:38 PDT 2015
On 2015-05-12 17:55:36, Kenneth Graunke wrote:
> For scalar GS support, we either need to add a third constructor which
forth, right?
Did you miss removing the compute constructor prototype from brw_fs.h?
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
> takes the GS structures, or combine the existing two and pass the shader
> stage.
>
> Given that they're not significantly different, I opted for the latter.
>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
> src/mesa/drivers/dri/i965/brw_cs.cpp | 6 ++-
> src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++-
> src/mesa/drivers/dri/i965/brw_fs.h | 15 ++------
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 55 +++-------------------------
> src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 +-
> 5 files changed, 20 insertions(+), 65 deletions(-)
>
> I decided to go ahead and send this out now, as I've had a bunch of rebase
> conflicts from it. Thoughts?
>
> diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp b/src/mesa/drivers/dri/i965/brw_cs.cpp
> index fc2d857..1f2a9d2 100644
> --- a/src/mesa/drivers/dri/i965/brw_cs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_cs.cpp
> @@ -90,7 +90,8 @@ brw_cs_emit(struct brw_context *brw,
>
> /* Now the main event: Visit the shader IR and generate our CS IR for it.
> */
> - fs_visitor v8(brw, mem_ctx, key, prog_data, prog, cp, 8);
> + fs_visitor v8(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
> + &cp->Base, 8);
> if (!v8.run_cs()) {
> fail_msg = v8.fail_msg;
> } else if (local_workgroup_size <= 8 * brw->max_cs_threads) {
> @@ -98,7 +99,8 @@ brw_cs_emit(struct brw_context *brw,
> prog_data->simd_size = 8;
> }
>
> - fs_visitor v16(brw, mem_ctx, key, prog_data, prog, cp, 16);
> + fs_visitor v16(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
> + &cp->Base, 16);
> if (likely(!(INTEL_DEBUG & DEBUG_NO16)) &&
> !fail_msg && !v8.simd16_unsupported &&
> local_workgroup_size <= 16 * brw->max_cs_threads) {
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 08664cf..b63ca23 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -4303,7 +4303,8 @@ brw_wm_fs_emit(struct brw_context *brw,
>
> /* Now the main event: Visit the shader IR and generate our FS IR for it.
> */
> - fs_visitor v(brw, mem_ctx, key, prog_data, prog, fp, 8);
> + fs_visitor v(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
> + prog, &fp->Base, 8);
> if (!v.run_fs()) {
> if (prog) {
> prog->LinkStatus = false;
> @@ -4317,7 +4318,8 @@ brw_wm_fs_emit(struct brw_context *brw,
> }
>
> cfg_t *simd16_cfg = NULL;
> - fs_visitor v2(brw, mem_ctx, key, prog_data, prog, fp, 16);
> + fs_visitor v2(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
> + prog, &fp->Base, 16);
> if (likely(!(INTEL_DEBUG & DEBUG_NO16) || brw->use_rep_send)) {
> if (!v.simd16_unsupported) {
> /* Try a SIMD16 compile */
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
> index 1d7de2e..e48c748 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -75,18 +75,11 @@ public:
>
> fs_visitor(struct brw_context *brw,
> void *mem_ctx,
> - const struct brw_wm_prog_key *key,
> - struct brw_wm_prog_data *prog_data,
> + gl_shader_stage stage,
> + const void *key,
> + struct brw_stage_prog_data *prog_data,
> struct gl_shader_program *shader_prog,
> - struct gl_fragment_program *fp,
> - unsigned dispatch_width);
> -
> - fs_visitor(struct brw_context *brw,
> - void *mem_ctx,
> - const struct brw_vs_prog_key *key,
> - struct brw_vs_prog_data *prog_data,
> - struct gl_shader_program *shader_prog,
> - struct gl_vertex_program *cp,
> + struct gl_program *prog,
> unsigned dispatch_width);
>
> fs_visitor(struct brw_context *brw,
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index 78f269e..abaea5f 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -4144,64 +4144,21 @@ fs_visitor::resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg)
>
> fs_visitor::fs_visitor(struct brw_context *brw,
> void *mem_ctx,
> - const struct brw_wm_prog_key *key,
> - struct brw_wm_prog_data *prog_data,
> + gl_shader_stage stage,
> + const void *key,
> + struct brw_stage_prog_data *prog_data,
> struct gl_shader_program *shader_prog,
> - struct gl_fragment_program *fp,
> + struct gl_program *prog,
> unsigned dispatch_width)
> - : backend_visitor(brw, shader_prog, &fp->Base, &prog_data->base,
> - MESA_SHADER_FRAGMENT),
> + : backend_visitor(brw, shader_prog, prog, prog_data, stage),
> reg_null_f(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_F)),
> reg_null_d(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_D)),
> reg_null_ud(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_UD)),
> - key(key), prog_data(&prog_data->base),
> + key(key), prog_data(prog_data),
> dispatch_width(dispatch_width), promoted_constants(0)
> {
> this->mem_ctx = mem_ctx;
> - init();
> -}
> -
> -fs_visitor::fs_visitor(struct brw_context *brw,
> - void *mem_ctx,
> - const struct brw_vs_prog_key *key,
> - struct brw_vs_prog_data *prog_data,
> - struct gl_shader_program *shader_prog,
> - struct gl_vertex_program *cp,
> - unsigned dispatch_width)
> - : backend_visitor(brw, shader_prog, &cp->Base, &prog_data->base.base,
> - MESA_SHADER_VERTEX),
> - reg_null_f(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_F)),
> - reg_null_d(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_D)),
> - reg_null_ud(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_UD)),
> - key(key), prog_data(&prog_data->base.base),
> - dispatch_width(dispatch_width), promoted_constants(0)
> -{
> - this->mem_ctx = mem_ctx;
> - init();
> -}
>
> -fs_visitor::fs_visitor(struct brw_context *brw,
> - void *mem_ctx,
> - const struct brw_cs_prog_key *key,
> - struct brw_cs_prog_data *prog_data,
> - struct gl_shader_program *shader_prog,
> - struct gl_compute_program *cp,
> - unsigned dispatch_width)
> - : backend_visitor(brw, shader_prog, &cp->Base, &prog_data->base,
> - MESA_SHADER_COMPUTE),
> - reg_null_f(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_F)),
> - reg_null_d(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_D)),
> - reg_null_ud(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_UD)),
> - key(key), prog_data(&prog_data->base),
> - dispatch_width(dispatch_width), promoted_constants(0)
> -{
> - this->mem_ctx = mem_ctx;
> - init();
> -}
> -
> -void
> -fs_visitor::init()
> -{
> switch (stage) {
> case MESA_SHADER_FRAGMENT:
> key_tex = &((const brw_wm_prog_key *) key)->tex;
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index 2841d98..e9681b7 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -1895,7 +1895,8 @@ brw_vs_emit(struct brw_context *brw,
> }
>
> if (brw->scalar_vs && (prog || use_nir)) {
> - fs_visitor v(brw, mem_ctx, &c->key, prog_data, prog, &c->vp->program, 8);
> + fs_visitor v(brw, mem_ctx, MESA_SHADER_VERTEX, &c->key,
> + &prog_data->base.base, prog, &c->vp->program.Base, 8);
> if (!v.run_vs()) {
> if (prog) {
> prog->LinkStatus = false;
> --
> 2.4.0
>
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