[Mesa-dev] [RFC 02/16] glsl: Add half float type
Roland Mainz
roland.mainz at nrubsig.org
Fri May 15 09:14:53 PDT 2015
On Fri, May 15, 2015 at 5:43 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:
> On Fri, May 15, 2015 at 5:39 AM, Topi Pohjolainen
> <topi.pohjolainen at intel.com> wrote:
>> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
>> ---
>> src/glsl/ast_to_hir.cpp | 1 +
>> src/glsl/glsl_types.cpp | 2 ++
>> src/glsl/glsl_types.h | 9 +++++++++
>> src/glsl/ir_clone.cpp | 1 +
>> src/glsl/link_uniform_initializers.cpp | 2 ++
>> src/glsl/nir/nir_lower_io.c | 1 +
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_shader.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 +
>> src/mesa/program/ir_to_mesa.cpp | 3 +++
>> 11 files changed, 23 insertions(+)
>>
>> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
>> index 7d5bb1d..332de5b 100644
>> --- a/src/glsl/ast_to_hir.cpp
>> +++ b/src/glsl/ast_to_hir.cpp
>> @@ -916,6 +916,7 @@ do_comparison(void *mem_ctx, int operation, ir_rvalue *op0, ir_rvalue *op1)
>> join_op = ir_binop_logic_or;
>>
>> switch (op0->type->base_type) {
>> + case GLSL_TYPE_HALF:
>
> Trivial feedback:
>
> I'd recommend calling this F16 or HALF_FLOAT -- mediump also applies
> to integers, of which there ought to be U16 and S16 varieties.
IEEE 754-2008 calls the 16bit floating point format |binary16| - see
http://en.wikipedia.org/wiki/IEEE_floating_point ... "half float" or
"minifloat" would work too... but there are different non-IEEE bit
layouts under that name while |binary16| explicitly refers to a IEEE
754-2008 conforming layout and implementation (e.g. with Nan and -Nan,
Inf and -Inf, and Nan payloads)
----
Bye,
Roland
--
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