[Mesa-dev] [PATCH v5] i915/aa: fixing anti-aliasing bug for thinnest width lines

[Predut, Marius]

Sorry , it is v1 not v5 ( for Pineview platform : http://ark.intel.com/products/codename/32201/Pineview)

> -----Original Message-----
> From: Predut, Marius
> Sent: Friday, May 29, 2015 2:51 PM
> To: mesa-dev at lists.freedesktop.org
> Cc: Predut, Marius
> Subject: [Mesa-dev][PATCH v5] i915/aa: fixing anti-aliasing bug for thinnest
> width lines
> 
> On PNV platform, for 1 pixel line thickness or less,
> the general anti-aliasing algorithm gives up, and a garbage line is generated.
> Setting a Line Width of 0.0 specifies the rasterization
> of the "thinnest" (one-pixel-wide), non-antialiased lines.
> Lines rendered with zero Line Width are rasterized using
> Grid Intersection Quantization rules as specified by
> bspec G45: Volume 2: 3D/Media,
> 7.3.13.1 Zero-Width (Cosmetic) Line Rasterization section.
> 
> This patch follow the same rules as patches fixing the
> https://bugs.freedesktop.org/show_bug.cgi?id=28832
> bug.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90367
> 
> Signed-off-by: Marius Predut <marius.predut at intel.com>
> ---
>  src/mesa/drivers/dri/i915/i915_state.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i915/i915_state.c
> b/src/mesa/drivers/dri/i915/i915_state.c
> index 5f10b84..6cd342c 100644
> --- a/src/mesa/drivers/dri/i915/i915_state.c
> +++ b/src/mesa/drivers/dri/i915/i915_state.c
> @@ -599,6 +599,21 @@ i915LineWidth(struct gl_context * ctx, GLfloat widthf)
> 
>     width = (int) (widthf * 2);
>     width = CLAMP(width, 1, 0xf);
> +
> +   if (ctx->Line.Width < 1.5 || widthf < 1.5) {
> +            /* For 1 pixel line thickness or less, the general
> +             * anti-aliasing algorithm gives up, and a garbage line is
> +             * generated.  Setting a Line Width of 0.0 specifies the
> +             * rasterization of the "thinnest" (one-pixel-wide),
> +             * non-antialiased lines.
> +             *
> +             * Lines rendered with zero Line Width are rasterized using
> +             * Grid Intersection Quantization rules as specified by
> +             * bspec G45: Volume 2: 3D/Media,
> +             * 7.3.13.1 Zero-Width (Cosmetic) Line Rasterization section
> +             */
> +            width = 0;
> +   }
>     lis4 |= width << S4_LINE_WIDTH_SHIFT;
> 
>     if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
> --
> 1.9.1