[Mesa-dev] [PATCH 1/6] i965: Consolidate certain miptree params to flags
Matt Turner
mattst88 at gmail.com
Fri May 29 12:14:15 PDT 2015
On Thu, May 28, 2015 at 10:21 AM, Ben Widawsky
<benjamin.widawsky at intel.com> wrote:
> I think pretty much everyone agrees that having more than a single bool as a
> function argument is bordering on a bad idea. What sucks about the current
> code is in several instances it's necessary to propagate these boolean
> selections down to lower layers of the code. This requires plumbing (mechanical,
> but still churn) pretty much all of the miptree functions each time. By
> introducing the flags paramater, it is possible to add miptree constraints very
> easily.
>
> The use of this, as is already the case, is sometimes we have some information
> at the time we create the miptree that needs to be known all the way at the
> lowest levels of the create/allocation, disable_aux_buffers is currently one
> such example. There will be another example coming up in a few patches.
>
> Cc: Chad Versace <chad.versace at linux.intel.com>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
> src/mesa/drivers/dri/i965/intel_fbo.c | 5 +-
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 86 +++++++++++++-------------
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 9 ++-
> src/mesa/drivers/dri/i965/intel_pixel_draw.c | 2 +-
> src/mesa/drivers/dri/i965/intel_tex.c | 8 +--
> src/mesa/drivers/dri/i965/intel_tex.h | 2 +-
> src/mesa/drivers/dri/i965/intel_tex_image.c | 14 ++---
> src/mesa/drivers/dri/i965/intel_tex_validate.c | 3 +-
> 8 files changed, 63 insertions(+), 66 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
> index aebed72..1b3a72f 100644
> --- a/src/mesa/drivers/dri/i965/intel_fbo.c
> +++ b/src/mesa/drivers/dri/i965/intel_fbo.c
> @@ -390,7 +390,7 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx,
> image->height,
> 1,
> image->pitch,
> - true /*disable_aux_buffers*/);
> + MIPTREE_LAYOUT_DISABLE_AUX);
> if (!irb->mt)
> return;
>
> @@ -1027,10 +1027,9 @@ intel_renderbuffer_move_to_temp(struct brw_context *brw,
> intel_image->base.Base.Level,
> intel_image->base.Base.Level,
> width, height, depth,
> - true,
> irb->mt->num_samples,
> INTEL_MIPTREE_TILING_ANY,
> - false);
> + MIPTREE_LAYOUT_ACCELERATED_UPLOAD);
>
> if (intel_miptree_wants_hiz_buffer(brw, new_mt)) {
> intel_miptree_alloc_hiz(brw, new_mt);
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 24a5c3d..b243f8a 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -244,10 +244,8 @@ intel_miptree_create_layout(struct brw_context *brw,
> GLuint width0,
> GLuint height0,
> GLuint depth0,
> - bool for_bo,
> GLuint num_samples,
> - bool force_all_slices_at_each_lod,
> - bool disable_aux_buffers)
> + uint32_t layout_flags)
> {
> struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
> if (!mt)
> @@ -286,7 +284,7 @@ intel_miptree_create_layout(struct brw_context *brw,
> mt->logical_height0 = height0;
> mt->logical_depth0 = depth0;
> mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS;
> - mt->disable_aux_buffers = disable_aux_buffers;
> + mt->disable_aux_buffers = !!(layout_flags & MIPTREE_LAYOUT_DISABLE_AUX);
FWIW, I much prefer (x & y) != 0 to !!(x & y).
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