[Mesa-dev] [PATCH 5/6] i965/gen9: Set HALIGN_16 for all aux buffers

Chad Versace chad.versace at intel.com
Fri May 29 17:06:09 PDT 2015


On Thu 28 May 2015, Ben Widawsky wrote:
> Just like the previous patch, but for the GEN9 constraints.
> 
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index a1ac0cf..89030aa 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -655,6 +655,11 @@ intel_miptree_create(struct brw_context *brw,
>  
>     assert((layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) == 0);
>     assert((layout_flags & MIPTREE_LAYOUT_FOR_BO) == 0);
> +
> +   if (brw->gen >= 9 && num_samples > 1)
> +      layout_flags |= MIPTREE_LAYOUT_FORCE_HALIGN16;
> +

The commit subject says this change applies to "all aux buffers", and
does not mention non-aux buffers. But the patch applies HALIGN16 to
a large set of non-aux buffers: all multisample buffers. Should the
patch's code be fixed to agree with the commit subject, or the converse?


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