[Mesa-dev] RFC: buffer support in TGSI for SSBO/atomic

[Marek Olšák]

On Mon, Nov 2, 2015 at 8:07 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:
> I haven't the faintest idea about efficiently, but these things flags
> on the ld/st instructions in the nvidia ISA for SM20+ (and I just
> plain don't know about SM10). I'm moderately sure that's the case for
> GCN as well.
>
> The difficulty with TGSI is that you might have something like
>
> layout (std430) buffer foo {
>   coherent int a;
>   int b;
> }
>
> Now I don't remember if they get baked into the same vec4, but I think
> they do. If they don't, then ARB_enhanced_layouts will fix that right
> up. Since TGSI is vec4-oriented, it's really awkward to specify that
> sort of thing... how would you do it?
>
> DECL BUFFER[0][0].x COHERENT
> DECL BUFFER[0][0].y
>
> And then totally unrelated to the separate bits, you can end up with
>
> layout (std430) buffer foo {
>   int foo[5];
> }
>
> and I have no idea how to even express that in TGSI -- it'd want
> things to be aligned to 16 bytes, but it'll be packed tightly here.
> This worked OK for layout (std140), but won't work with more advanced
> layouts. This will be a problem for UBOs too -- perhaps we need to
> allow something like
>
> LOAD dst, CONST[1][0], offset
>
> to account for that. And lastly, ssbo allows for something like
>
> layout (std430) buffer foo {
>   int foo[];
> }
>
> And you can access foo[anything-you-want] -- difficult to declare that
> in TGSI. I could invent stuff for all of these situations, but it
> seems to be a lot easier to just feed the data to load and forget
> about it. That's how it's all encoded in the GLSL IR as well.

That's even more fun than I thought. ;)

I guess declaring buffers and not variables is the way to go, e.g.:

BUFFER[0]
BUFFER[1]

Then you can put the offsets and flags into loads and stores:

LOAD dst.xyz, BUFFER[0], offset_in_dwords # coherent, volatile

A backend that cares about declarations can reconstruct them by
reading the instructions.

Marek