[Mesa-dev] [PATCH 11/13] i965/vec4: rework the src_reg/dst_reg constructors
Emil Velikov
emil.l.velikov at gmail.com
Thu Nov 5 08:17:59 PST 2015
From: Emil Velikov <emil.velikov at collabora.co.uk>
Analogous to the previous (fs) commit - drop the explicit memset and
set the non-inherited variables (reladdr) manually.
Signed-off-by: Emil Velikov <emil.velikov at collabora.co.uk>
---
src/mesa/drivers/dri/i965/brw_ir_vec4.h | 13 +++----
src/mesa/drivers/dri/i965/brw_vec4.cpp | 48 ++++----------------------
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 10 +++---
3 files changed, 14 insertions(+), 57 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
index e10c440..b70dca5 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
@@ -37,11 +37,9 @@ class src_reg : public backend_reg
public:
DECLARE_RALLOC_CXX_OPERATORS(src_reg)
- void init();
-
+ src_reg() : reladdr(NULL) {}
+ src_reg(struct brw_reg reg) : backend_reg(reg), reladdr(NULL) {}
src_reg(enum brw_reg_file file, int nr, const glsl_type *type);
- src_reg();
- src_reg(struct brw_reg reg);
bool equals(const src_reg &r) const;
@@ -99,9 +97,8 @@ class dst_reg : public backend_reg
public:
DECLARE_RALLOC_CXX_OPERATORS(dst_reg)
- void init();
-
- dst_reg();
+ dst_reg() : reladdr(NULL) {}
+ dst_reg(struct brw_reg reg) : backend_reg(reg), reladdr(NULL) {}
dst_reg(enum brw_reg_file file, int nr,
brw_reg_type type = BRW_REGISTER_TYPE_UD,
@@ -111,8 +108,6 @@ public:
unsigned writemask) :
dst_reg(file, nr, brw_type_for_base_type(type), writemask) {}
- dst_reg(struct brw_reg reg);
-
dst_reg(class vec4_visitor *v, const struct glsl_type *type);
explicit dst_reg(const src_reg ®);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 66ea15e..618ac35 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -43,17 +43,9 @@ using namespace brw;
namespace brw {
-void
-src_reg::init()
-{
- memset(this, 0, sizeof(*this));
-
- this->file = BAD_FILE;
-}
-
src_reg::src_reg(enum brw_reg_file file, int nr, const glsl_type *type)
{
- init();
+ this->reladdr = NULL;
this->file = file;
this->nr = nr;
@@ -65,42 +57,19 @@ src_reg::src_reg(enum brw_reg_file file, int nr, const glsl_type *type)
this->type = brw_type_for_base_type(type);
}
-/** Generic unset register constructor. */
-src_reg::src_reg()
-{
- init();
-}
-
-src_reg::src_reg(struct brw_reg reg) :
- backend_reg(reg)
-{
- this->reladdr = NULL;
-}
-
src_reg::src_reg(const dst_reg ®) :
backend_reg(static_cast<struct brw_reg>(reg))
{
this->reladdr = reg.reladdr;
- this->swizzle = brw_swizzle_for_mask(reg.writemask);
-}
-void
-dst_reg::init()
-{
- memset(this, 0, sizeof(*this));
- this->file = BAD_FILE;
- this->writemask = WRITEMASK_XYZW;
-}
-
-dst_reg::dst_reg()
-{
- init();
+ this->reg_offset = reg.reg_offset;
+ this->swizzle = brw_swizzle_for_mask(reg.writemask);
}
dst_reg::dst_reg(enum brw_reg_file file, int nr, brw_reg_type type,
unsigned writemask)
{
- init();
+ this->reladdr = NULL;
this->file = file;
this->nr = nr;
@@ -108,18 +77,13 @@ dst_reg::dst_reg(enum brw_reg_file file, int nr, brw_reg_type type,
this->writemask = writemask;
}
-dst_reg::dst_reg(struct brw_reg reg) :
- backend_reg(reg)
-{
- this->reladdr = NULL;
-}
-
dst_reg::dst_reg(const src_reg ®) :
backend_reg(static_cast<struct brw_reg>(reg))
{
+ this->reladdr = reg.reladdr;
+
this->reg_offset = reg.reg_offset;
this->writemask = brw_mask_for_swizzle(reg.swizzle);
- this->reladdr = reg.reladdr;
}
bool
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index debe1ed..b42a350 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -631,34 +631,32 @@ type_size_vec4(const struct glsl_type *type)
src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type, int size)
{
assert(size > 0);
- init();
+ this->reladdr = NULL;
this->file = VGRF;
this->nr = v->alloc.allocate(type_size_vec4(type) * size);
+ this->type = brw_type_for_base_type(type);
if (type->is_array() || type->is_record()) {
this->swizzle = BRW_SWIZZLE_NOOP;
} else {
this->swizzle = brw_swizzle_for_size(type->vector_elements);
}
-
- this->type = brw_type_for_base_type(type);
}
dst_reg::dst_reg(class vec4_visitor *v, const struct glsl_type *type)
{
- init();
+ this->reladdr = NULL;
this->file = VGRF;
this->nr = v->alloc.allocate(type_size_vec4(type));
+ this->type = brw_type_for_base_type(type);
if (type->is_array() || type->is_record()) {
this->writemask = WRITEMASK_XYZW;
} else {
this->writemask = (1 << type->vector_elements) - 1;
}
-
- this->type = brw_type_for_base_type(type);
}
vec4_instruction *
--
2.6.2
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