[Mesa-dev] [PATCH] nvc0: enable compute support on Fermi

[Ilia Mirkin]

On Thu, Nov 5, 2015 at 6:41 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Altough the compute support is still not complete because textures and
> surfaces need to be implemented, it allows to launch very simple compute
> kernel like one which reads reading MP performance counters.

Didn't those end up breaking 3d rendering? Have you figured out what
was overwriting what?

>
> This turns on PIPE_CAP_COMPUTE and PIPE_SHADER_COMPUTE.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 7d96977..5b7b39b 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -186,7 +186,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
>     case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
>        return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
>     case PIPE_CAP_COMPUTE:
> -      return (class_3d == NVE4_3D_CLASS) ? 1 : 0;
> +      return 1;

Of course this also enables it for NVF0_3D_CLASS. Pretty sure compute
doesn't work there for some dumb reason (like we're missing some in
our ctxsw fw...)

>     case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
>        return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
>
> @@ -245,8 +245,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
>           return 0;
>        break;
>     case PIPE_SHADER_COMPUTE:
> -      if (class_3d != NVE4_3D_CLASS)
> -         return 0;
>        break;
>     default:
>        return 0;
> --
> 2.5.3
>
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