[Mesa-dev] [PATCH 4/7] gallium/radeon: move GFX/DMA flushing from add_to_buffer_list to need_cs_space
Marek Olšák
maraeo at gmail.com
Sun Nov 8 13:45:23 PST 2015
From: Marek Olšák <marek.olsak at amd.com>
need_cs_space isn't invoked so often and is called before all commands too.
This is a lot cleaner. The code in radeon_add_to_buffer_list always seemed
dodgy to me.
---
src/gallium/drivers/r600/r600_hw_context.c | 5 +++++
src/gallium/drivers/radeon/r600_cs.h | 15 ---------------
src/gallium/drivers/radeon/r600_pipe_common.c | 4 ++++
src/gallium/drivers/radeonsi/si_hw_context.c | 5 +++++
4 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 6f11366..cf8a07f 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -33,6 +33,11 @@
void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
boolean count_draw_in)
{
+ struct radeon_winsys_cs *dma = ctx->b.rings.dma.cs;
+
+ /* Flush the DMA IB if it's not empty. */
+ if (dma && dma->cdw)
+ ctx->b.rings.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
if (!ctx->b.ws->cs_memory_below_limit(ctx->b.rings.gfx.cs, ctx->b.vram, ctx->b.gtt)) {
ctx->b.gtt = 0;
diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h
index b5a1daf..ad067ce 100644
--- a/src/gallium/drivers/radeon/r600_cs.h
+++ b/src/gallium/drivers/radeon/r600_cs.h
@@ -50,21 +50,6 @@ static inline unsigned radeon_add_to_buffer_list(struct r600_common_context *rct
enum radeon_bo_priority priority)
{
assert(usage);
-
- /* Make sure that all previous rings are flushed so that everything
- * looks serialized from the driver point of view.
- */
- if (!ring->flushing) {
- if (ring == &rctx->rings.gfx) {
- if (rctx->rings.dma.cs) {
- /* flush dma ring */
- rctx->rings.dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
- }
- } else {
- /* flush gfx ring */
- rctx->rings.gfx.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
- }
- }
return rctx->ws->cs_add_buffer(ring->cs, rbo->cs_buf, usage,
rbo->domains, priority) * 4;
}
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 79e624e..e7179dc 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -117,6 +117,10 @@ void r600_draw_rectangle(struct blitter_context *blitter,
void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw)
{
+ /* Flush the GFX IB if it's not empty. */
+ if (ctx->rings.gfx.cs->cdw > ctx->initial_gfx_cs_size)
+ ctx->rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
+
/* Flush if there's not enough space. */
if ((num_dw + ctx->rings.dma.cs->cdw) > ctx->rings.dma.cs->max_dw) {
ctx->rings.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 9b8bdf5..7d0e6d4 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -30,6 +30,11 @@
void si_need_cs_space(struct si_context *ctx)
{
struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
+ struct radeon_winsys_cs *dma = ctx->b.rings.dma.cs;
+
+ /* Flush the DMA IB if it's not empty. */
+ if (dma && dma->cdw)
+ ctx->b.rings.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
/* There are two memory usage counters in the winsys for all buffers
* that have been added (cs_add_buffer) and two counters in the pipe
--
2.1.4
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