[Mesa-dev] [PATCH] i965/fs/nir: fix the number of register written by FS_OPCODE_GET_BUFFER_SIZE

Lofstedt, Marta marta.lofstedt at intel.com
Wed Nov 11 07:34:20 PST 2015


Nice! 
This fixes 12 GLES 3.1 CTS tests.

> -----Original Message-----
> From: mesa-dev [mailto:mesa-dev-bounces at lists.freedesktop.org] On
> Behalf Of Samuel Iglesias Gonsálvez
> Sent: Wednesday, November 11, 2015 4:07 PM
> To: mesa-dev at lists.freedesktop.org
> Subject: [Mesa-dev] [PATCH] i965/fs/nir: fix the number of register written
> by FS_OPCODE_GET_BUFFER_SIZE
> 
> FS_OPCODE_GET_BUFFER_SIZE is calculated with a resinfo's sampler
> message.
> 
> This patch adjusts the number of registers written by the opcode following
> what the PRM spec says about the number of registers written by the SIMD8
> and SIMD16's writeback messages for sampler messages.
> 
> Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> Cc: tapani.palli at intel.com
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index 02b9f5b..61c9f2e 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -2297,16 +2297,29 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
> &bld, nir_intrinsic_instr *instr
>        fs_reg source = fs_reg(0);
> 
>        int mlen = 1 * reg_width;
> +
> +      /* A resinfo's sampler message is used to get the buffer size.
> +       * The SIMD8's writeback message consists of four registers and
> +       * SIMD16's writeback message consists of 8 destination registers
> +       * (two per each component), although we are only interested on the
> +       * first component, where resinfo returns the buffer size for
> +       * SURFTYPE_BUFFER.
> +       */
> +      int regs_written = 4 * mlen;
>        fs_reg src_payload = fs_reg(GRF, alloc.allocate(mlen),
>                                    BRW_REGISTER_TYPE_UD);
>        bld.LOAD_PAYLOAD(src_payload, &source, 1, 0);
> -
> +      fs_reg buffer_size = fs_reg(GRF, alloc.allocate(regs_written),
> +                                  BRW_REGISTER_TYPE_UD);
>        const unsigned index = prog_data->binding_table.ssbo_start +
> ssbo_index;
> -      fs_inst *inst = bld.emit(FS_OPCODE_GET_BUFFER_SIZE, dest,
> +      fs_inst *inst = bld.emit(FS_OPCODE_GET_BUFFER_SIZE, buffer_size,
>                                 src_payload, fs_reg(index));
>        inst->header_size = 0;
>        inst->mlen = mlen;
> +      inst->regs_written = regs_written;
>        bld.emit(inst);
> +      dest.type = buffer_size.type;
> +      bld.MOV(dest, buffer_size);
> 
>        brw_mark_surface_used(prog_data, index);
>        break;
> --
> 2.5.0
> 
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