[Mesa-dev] [PATCH 02/36] i965: Keep track of whether LRI is allowed in the context struct.
Jordan Justen
jordan.l.justen at intel.com
Sat Nov 14 15:19:44 PST 2015
On 2015-11-14 13:43:38, Jordan Justen wrote:
> From: Francisco Jerez <currojerez at riseup.net>
>
> This stores the result of can_do_pipelined_register_writes() in the
> context struct so we can find out later whether LRI can be used to
> program the L3 configuration.
> ---
> src/mesa/drivers/dri/i965/brw_context.h | 5 +++++
> src/mesa/drivers/dri/i965/intel_extensions.c | 8 +++++---
> 2 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index 4b2db61..20d2dd0 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -840,6 +840,11 @@ struct brw_context
> bool use_resource_streamer;
>
> /**
> + * Whether LRI can be used to write register values from the batch buffer.
> + */
> + bool can_do_pipelined_register_writes;
> +
> + /**
> * Some versions of Gen hardware don't do centroid interpolation correctly
> * on unlit pixels, causing incorrect values for derivatives near triangle
> * edges. Enabling this flag causes the fragment shader to use
> diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c
> index 386b63c..800e97c 100644
> --- a/src/mesa/drivers/dri/i965/intel_extensions.c
> +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
> @@ -40,8 +40,8 @@
> static bool
> can_do_pipelined_register_writes(struct brw_context *brw)
> {
> - /* Supposedly, Broadwell just works. */
> - if (brw->gen >= 8)
> + /* Supposedly Broadwell just works, and earlier gens are sloppy. */
> + if (brw->gen != 7)
I think this change should be moved into a separate patch.
Also, what about something like this comment instead?
/**
* gen >= 8 specifically allows these writes. gen <= 6 also
* doesn't block them.
*/
With this split out, the patch is
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
> return true;
>
> static int result = -1;
> @@ -319,6 +319,8 @@ intelInitExtensions(struct gl_context *ctx)
> }
>
> brw->predicate.supported = false;
> + brw->can_do_pipelined_register_writes =
> + can_do_pipelined_register_writes(brw);
>
> if (brw->gen >= 7) {
> ctx->Extensions.ARB_conservative_depth = true;
> @@ -334,7 +336,7 @@ intelInitExtensions(struct gl_context *ctx)
> ctx->Extensions.ARB_texture_view = true;
> ctx->Extensions.ARB_shader_storage_buffer_object = true;
>
> - if (can_do_pipelined_register_writes(brw)) {
> + if (brw->can_do_pipelined_register_writes) {
> ctx->Extensions.ARB_draw_indirect = true;
> ctx->Extensions.ARB_transform_feedback2 = true;
> ctx->Extensions.ARB_transform_feedback3 = true;
> --
> 2.6.2
>
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