[Mesa-dev] [PATCH 00/11] i965/nir: Do texture rectangle lowering in NIR

[Iago Toral]

On Wed, 2015-11-11 at 17:27 -0800, Jason Ekstrand wrote:
> On Wed, Nov 11, 2015 at 5:23 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> > On older hardware (Iron Lake and below), we can't support texture rectangle
> > natively.  Sandy Bridge through Haswell can support it but don't support
> > the GL_CLAMP wrap mode natively.  It isn't until Broadwell that GL_CLAMP is
> > supported together with GL_TEXTURE_RECTANGLE in hardware.  In the cases
> > where it isn't supported, we have to fake it by dividing by the texture
> > size.
> >
> > Previously, we had a rescale_texcoord function added a uniform to hold the
> > texture coordinate and used that to rescale/clamp the texture coordinates.
> > For a while now, nir_lower_tex has been able to lower texture rectangle to
> > a textureSize and a regular texture2D operation.  This series makes i965
> > use the nir_lower_tex path instead.  Incidentally, this fixes texture
> > rectangle support in vertex and geometry shaders on Haswell and below.
> > (The backend lowering was only ever done in the FS backend.)
> >
> > Since this is the first time we're doing any sort of shader variants in
> > NIR, the first several passes add the infastructure to do so.  Two of these
> > patches are from Ken, two are from Rob, and one (nir_clone itself) is my
> > rendition but heavily based on what Rob did only with less hashing.
> 
> Once again, git-send-email failed to send one of the patches
> (nir_clone).  You can find the whole thing on my freedesktop cgit:
> 
> http://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/i965-nir-variants

Jason: I think I reviewed everything but the nir-clone patch. I figured
Connor or Rob would be better suited to review that one. That said, if
they can't review it promptly let me know and I'll give it a go.

Iago

> > Jason Ekstrand (7):
> >   nir: support to clone shaders
> >   i965/nir: Split shader optimization and lowering into three satages
> >   i965: Move postprocess_nir to codegen time
> >   nir/lower_tex: Report progress
> >   nir/lower_tex: Set the dest_type for txs instructions
> >   i965/fs: Don't allow SINT32 as a return type for resinfo
> >   i965: Use nir_lower_tex for texture coordinate lowering
> >
> > Kenneth Graunke (2):
> >   i965/nir: Add OPT() and OPT_V() macros for invoking NIR passes.
> >   i965/nir: Validate that NIR passes call nir_metadata_preserve().
> >
> > Rob Clark (2):
> >   nir: remove nir_variable::max_ifc_array_access
> >   nir: add array length field
> >
> >  src/glsl/Makefile.sources                         |   1 +
> >  src/glsl/nir/glsl_to_nir.cpp                      |  14 +-
> >  src/glsl/nir/nir.c                                |   8 +
> >  src/glsl/nir/nir.h                                |  27 +-
> >  src/glsl/nir/nir_clone.c                          | 671 ++++++++++++++++++++++
> >  src/glsl/nir/nir_lower_tex.c                      |  20 +-
> >  src/glsl/nir/nir_metadata.c                       |  36 ++
> >  src/mesa/drivers/dri/i965/brw_fs.cpp              |  13 +-
> >  src/mesa/drivers/dri/i965/brw_fs.h                |   3 -
> >  src/mesa/drivers/dri/i965/brw_fs_generator.cpp    |  10 +-
> >  src/mesa/drivers/dri/i965/brw_fs_nir.cpp          |   4 +-
> >  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp      | 125 ----
> >  src/mesa/drivers/dri/i965/brw_nir.c               | 268 +++++----
> >  src/mesa/drivers/dri/i965/brw_nir.h               |  15 +
> >  src/mesa/drivers/dri/i965/brw_vec4.cpp            |   7 +-
> >  src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |   8 +-
> >  16 files changed, 966 insertions(+), 264 deletions(-)
> >  create mode 100644 src/glsl/nir/nir_clone.c
> >
> > --
> > 2.5.0.400.gff86faf
> >
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