[Mesa-dev] [PATCH] nvc0: fix wrong value for NVC8_COMPUTE_CLASS

Samuel Pitoiset samuel.pitoiset at gmail.com
Mon Nov 16 04:02:04 PST 2015



On 11/16/2015 11:55 AM, Emil Velikov wrote:
> On 9 October 2015 at 14:10, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote:
>> Compute class value for GF110+ is 0x91c0 and not 0x92c0. This fixes
>> compute support and MP performance counters on GF110.
>>
>> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
>> ---
>>   src/gallium/drivers/nouveau/nv_object.xml.h | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h
>> index 0a0e187..92c0633 100644
>> --- a/src/gallium/drivers/nouveau/nv_object.xml.h
>> +++ b/src/gallium/drivers/nouveau/nv_object.xml.h
>> @@ -197,7 +197,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
>>   #define NV50_COMPUTE_CLASS                                     0x000050c0
>>   #define NVA3_COMPUTE_CLASS                                     0x000085c0
>>   #define NVC0_COMPUTE_CLASS                                     0x000090c0
>> -#define NVC8_COMPUTE_CLASS                                     0x000092c0
>> +#define NVC8_COMPUTE_CLASS                                     0x000091c0
> Worth updating the classic one (src/mesa/drivers/dri/nouveau/) as well ?

I don't think it's useful because the classic one is for < NV50.
But one day, we should re-generate those headers.

>
> There is a nasty looking comment in nvc0_screen_compute_setup about
> the above class. Afaics although updated the define isn't used
> anywhere so I'm dubious how it fixes compute on GF110.

This actually only fixes the value of the NVC8_COMPUTE_CLASS. I did this 
patch before writing that comment in nvc0_screen_compute_setup().

In practice, GF100/GF110 should support 0x91c0 but for some weird 
reason, a ILLEGAL_CLASS dmesg appears when using it.

Anyway, 0x91c0 only introduces some minor changes regarding 0x90c0. 
That's why we use 0x90c0 for all NV50 chipsets.


>
> Cheers,
> Emil
>

-- 
-Samuel


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