[Mesa-dev] [Mesa-stable] [PATCH 2/2] r200: fix bgrx8/xrgb8 blits

[Ian Romanick]

Tested-by: Ian Romanick <ian.d.romanick at intel.com>

On 11/12/2015 11:00 AM, sroland at vmware.com wrote:
> From: Roland Scheidegger <sroland at vmware.com>
> 
> Since 779cabfc7d022de8b7b9bc7fdac0caffa8646c51 the same txformat table entries
> are used for "normal" texturing as well as for blits. However, I forgot to put
> in an entry for the bgrx8 (le) and xrgb8 (be) formats - the normal texturing
> path can't hit them because the radeon tex format chooser will never chose
> them, but we get that format from the dri buffers (at least I assume we got
> it from there).
> This is untested but essentially addressing the same bug as for radeon.
> (I don't think that the second entry per le/be table is actually necessary,
> but shouldn't hurt...)
> 
> Cc: "11.0" <mesa-stable at lists.freedesktop.org>
> ---
>  src/mesa/drivers/dri/r200/r200_tex.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/r200/r200_tex.h b/src/mesa/drivers/dri/r200/r200_tex.h
> index a8c31b7..14f5e71 100644
> --- a/src/mesa/drivers/dri/r200/r200_tex.h
> +++ b/src/mesa/drivers/dri/r200/r200_tex.h
> @@ -63,7 +63,9 @@ static const struct tx_table tx_table_be[] =
>     [ MESA_FORMAT_A8B8G8R8_UNORM ] = { R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
>     [ MESA_FORMAT_R8G8B8A8_UNORM ] = { R200_TXFORMAT_RGBA8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
>     [ MESA_FORMAT_B8G8R8A8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
> +   [ MESA_FORMAT_B8G8R8X8_UNORM ] = { R200_TXFORMAT_ARGB8888, 0 },
>     [ MESA_FORMAT_A8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
> +   [ MESA_FORMAT_X8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888, 0 },
>     [ MESA_FORMAT_BGR_UNORM8 ] = { 0xffffffff, 0 },
>     [ MESA_FORMAT_B5G6R5_UNORM ] = { R200_TXFORMAT_RGB565, 0 },
>     [ MESA_FORMAT_R5G6B5_UNORM ] = { R200_TXFORMAT_RGB565, 0 },
> @@ -91,7 +93,9 @@ static const struct tx_table tx_table_le[] =
>     [ MESA_FORMAT_A8B8G8R8_UNORM ] = { R200_TXFORMAT_RGBA8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
>     [ MESA_FORMAT_R8G8B8A8_UNORM ] = { R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
>     [ MESA_FORMAT_B8G8R8A8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
> +   [ MESA_FORMAT_B8G8R8X8_UNORM ] = { R200_TXFORMAT_ARGB8888, 0 },
>     [ MESA_FORMAT_A8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
> +   [ MESA_FORMAT_X8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888, 0 },
>     [ MESA_FORMAT_BGR_UNORM8 ] = { R200_TXFORMAT_ARGB8888, 0 },
>     [ MESA_FORMAT_B5G6R5_UNORM ] = { R200_TXFORMAT_RGB565, 0 },
>     [ MESA_FORMAT_R5G6B5_UNORM ] = { R200_TXFORMAT_RGB565, 0 },
>