[Mesa-dev] [PATCH] i965: Use ull immediates in brw_inst_bits

Jason Ekstrand jason at jlekstrand.net
Mon Nov 23 14:06:02 PST 2015


On Mon, Nov 23, 2015 at 10:54 AM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> This fixes a regression introduced in b1a83b5d1 that caused basically all
> shaders to fail to compile on 32-bit platforms.
>
> Reported-by: Mark Janes <mark.a.janes at intel.com>
> Cc: Matt Turner <mattst88 at gmail.com>
> ---
>  src/mesa/drivers/dri/i965/brw_inst.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
> index b2afe17..cd9f6ef 100644
> --- a/src/mesa/drivers/dri/i965/brw_inst.h
> +++ b/src/mesa/drivers/dri/i965/brw_inst.h
> @@ -694,7 +694,7 @@ brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low)
>     high %= 64;
>     low %= 64;
>
> -   const uint64_t mask = (~0ul >> (64 - (high - low + 1)));
> +   const uint64_t mask = (~0ull >> (64 - (high - low + 1)));
>
>     return (inst->data[word] >> low) & mask;
>  }
> @@ -713,7 +713,7 @@ brw_inst_set_bits(brw_inst *inst, unsigned high, unsigned low, uint64_t value)
>     high %= 64;
>     low %= 64;
>
> -   const uint64_t mask = (~0ul >> (64 - (high - low + 1))) << low;
> +   const uint64_t mask = (~0ull >> (64 - (high - low + 1))) << low;
>
>     /* Make sure the supplied value actually fits in the given bitfield. */
>     assert((value & (mask >> low)) == value);
> --
> 2.5.0.400.gff86faf
>


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