[Mesa-dev] [PATCH v2 27/42] i965/fs: Handle nir shared variable load intrinsic

Iago Toral itoral at igalia.com
Wed Nov 25 02:57:03 PST 2015


On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_defines.h  |  2 ++
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 33 ++++++++++++++++++++++++++++++++
>  2 files changed, 35 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index ade3ede..8189c08 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -2867,4 +2867,6 @@ enum brw_wm_barycentric_interp_mode {
>  # define GPGPU_WALKER_THREAD_WIDTH_MAX_SHIFT    0
>  # define GPGPU_WALKER_THREAD_WIDTH_MAX_MASK     INTEL_MASK(5, 0)
>  
> +#define BRW_SLM_SURFACE_INDEX 0xfe
> +

I imagine that shared memory is always fixed at this index and we don't
need to setup the surface in the driver? I have not been able to find
the reference to that in the docs though.

Iago

>  #endif
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index c282f83..e9336fd 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -33,6 +33,9 @@
>  #include "brw_fs_surface_builder.h"
>  #include "brw_vec4_gs_visitor.h"
>  
> +#include "brw_fs_builder.h"
> +#include "brw_fs_surface_builder.h"

brw_fs_surface_builder.h is already included below and that already
includes brw_fs_builder.h, so no need to include them here.

>  using namespace brw;
>  using namespace brw::surface_access;
>  
> @@ -2297,6 +2300,36 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
>        break;
>     }
>  
> +   case nir_intrinsic_load_shared_indirect:
> +      has_indirect = true;
> +      /* fallthrough */
> +   case nir_intrinsic_load_shared: {
> +      assert(devinfo->gen >= 7);
> +
> +      fs_reg surf_index;
> +      unsigned index = BRW_SLM_SURFACE_INDEX;
> +      surf_index = fs_reg(index);
> +
> +      /* Get the offset to read from */
> +      fs_reg offset_reg;
> +      if (has_indirect) {
> +         offset_reg = get_nir_src(instr->src[0]);
> +      } else {
> +         offset_reg = fs_reg(instr->const_index[0]);
> +      }
> +
> +      /* Read the vector */
> +      fs_reg read_result = emit_untyped_read(bld, surf_index, offset_reg,
> +                                             1 /* dims */,
> +                                             instr->num_components,
> +                                             BRW_PREDICATE_NONE);
> +      read_result.type = dest.type;
> +      for (int i = 0; i < instr->num_components; i++)
> +         bld.MOV(offset(dest, bld, i), offset(read_result, bld, i));
> +
> +      break;
> +   }
> +
>     case nir_intrinsic_load_input_indirect:
>        has_indirect = true;
>        /* fallthrough */




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