[Mesa-dev] [PATCH 2/3] i965/fs: Don't use Gen7-style scratch block reads on Gen9+.
Francisco Jerez
currojerez at riseup.net
Wed Nov 25 11:37:53 PST 2015
Unfortunately Gen7 scratch block reads and writes seem to be hardwired
to BTI 255 even on Gen9+ where that index causes the dataport to do an
IA-coherent read or write. This change is required for the next patch
to be correct, since otherwise we would be writing to the scratch
space using non-coherent access and then reading it back using
IA-coherent reads, which wouldn't be guaranteed to return the value
previously written to the same location without introducing additional
HDC flushes in between.
---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 1b61f9f..2917071 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -723,8 +723,15 @@ fs_visitor::emit_unspill(bblock_t *block, fs_inst *inst, fs_reg dst,
.at(block, inst);
for (int i = 0; i < count / reg_size; i++) {
- /* The gen7 descriptor-based offset is 12 bits of HWORD units. */
- bool gen7_read = devinfo->gen >= 7 && spill_offset < (1 << 12) * REG_SIZE;
+ /* The Gen7 descriptor-based offset is 12 bits of HWORD units. Because
+ * the Gen7-style scratch block read is hardwired to BTI 255, on Gen9+
+ * it would cause the DC to do an IA-coherent read, what largely
+ * outweighs the slight advantage from not having to provide the address
+ * as part of the message header, so we're better off using plain old
+ * oword block reads.
+ */
+ bool gen7_read = (devinfo->gen >= 7 && devinfo->gen < 9 &&
+ spill_offset < (1 << 12) * REG_SIZE);
fs_inst *unspill_inst = ibld.emit(gen7_read ?
SHADER_OPCODE_GEN7_SCRATCH_READ :
SHADER_OPCODE_GEN4_SCRATCH_READ,
--
2.5.1
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