[Mesa-dev] [RFC 5/5] i965/vec4: Plumb separate surfaces and samplers through from NIR
Jason Ekstrand
jason at jlekstrand.net
Wed Nov 25 17:53:47 PST 2015
On Nov 25, 2015 4:18 PM, "Kenneth Graunke" <kenneth at whitecape.org> wrote:
>
> On Tuesday, November 03, 2015 01:26:04 PM Jason Ekstrand wrote:
> > ---
> > src/mesa/drivers/dri/i965/brw_vec4.h | 4 +++-
> > src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 27
++++++++++++++++++--------
> > src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 12 ++++++++----
> > 3 files changed, 30 insertions(+), 13 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
> > index ec8abf4..52d68c5 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4.h
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4.h
> > @@ -273,9 +273,11 @@ public:
> > src_reg offset_value,
> > src_reg mcs,
> > bool is_cube_array,
> > + uint32_t surface, src_reg surface_reg,
> > uint32_t sampler, src_reg sampler_reg);
> >
> > - uint32_t gather_channel(unsigned gather_component, uint32_t
sampler);
> > + uint32_t gather_channel(unsigned gather_component,
> > + uint32_t surface, uint32_t sampler);
> > src_reg emit_mcs_fetch(const glsl_type *coordinate_type, src_reg
coordinate,
> > src_reg sampler);
> > void emit_gen6_gather_wa(uint8_t wa, dst_reg dst);
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> > index 7a6372b..86e3dec 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> > @@ -1585,7 +1585,9 @@ glsl_type_for_nir_alu_type(nir_alu_type alu_type,
> > void
> > vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
> > {
> > + unsigned texture = instr->texture_index;
>
> Here you call it texture, later in gather_channel() you call it surface.
>
> I kind of prefer surface, though I suppose it's not the actual binding
> table index, but rather a texture unit number. *shrug* We should
> probably be consistent though? (I don't feel too strongly though.)
Yeah. Texture seemed better from a GL point of view but surface seemed
better in the back end. I can rename it all texture if you'd like.
> > unsigned sampler = instr->sampler_index;
> > + src_reg texture_reg = src_reg(texture);
> > src_reg sampler_reg = src_reg(sampler);
> > src_reg coordinate;
> > const glsl_type *coord_type = NULL;
> > @@ -1666,8 +1668,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr
*instr)
> > sample_index = get_nir_src(instr->src[i].src,
BRW_REGISTER_TYPE_D, 1);
> > assert(coord_type != NULL);
> > if (devinfo->gen >= 7 &&
> > - key_tex->compressed_multisample_layout_mask & (1 <<
sampler)) {
> > - mcs = emit_mcs_fetch(coord_type, coordinate, sampler_reg);
> > + key_tex->compressed_multisample_layout_mask & (1 <<
texture)) {
> > + mcs = emit_mcs_fetch(coord_type, coordinate, texture_reg);
> > } else {
> > mcs = src_reg(0u);
> > }
> > @@ -1679,13 +1681,12 @@ vec4_visitor::nir_emit_texture(nir_tex_instr
*instr)
> > offset_value = get_nir_src(instr->src[i].src,
BRW_REGISTER_TYPE_D, 2);
> > break;
> >
> > - case nir_tex_src_sampler_offset: {
> > - /* The highest sampler which may be used by this operation is
> > + case nir_tex_src_texture_offset: {
> > + /* The highest texture which may be used by this operation is
> > * the last element of the array. Mark it here, because the
generator
> > * doesn't have enough information to determine the bound.
> > */
> > - uint32_t array_size = instr->texture_array_size;
> > - uint32_t max_used = sampler + array_size - 1;
> > + uint32_t max_used = texture + instr->texture_array_size - 1;
> > if (instr->op == nir_texop_tg4) {
> > max_used +=
prog_data->base.binding_table.gather_texture_start;
> > } else {
> > @@ -1697,6 +1698,15 @@ vec4_visitor::nir_emit_texture(nir_tex_instr
*instr)
> > /* Emit code to evaluate the actual indexing expression */
> > src_reg src = get_nir_src(instr->src[i].src, 1);
> > src_reg temp(this, glsl_type::uint_type);
> > + emit(ADD(dst_reg(temp), src, src_reg(texture)));
> > + texture_reg = emit_uniformize(temp);
> > + break;
> > + }
> > +
> > + case nir_tex_src_sampler_offset: {
> > + /* Emit code to evaluate the actual indexing expression */
> > + src_reg src = get_nir_src(instr->src[i].src, 1);
> > + src_reg temp(this, glsl_type::uint_type);
> > emit(ADD(dst_reg(temp), src, src_reg(sampler)));
> > sampler_reg = emit_uniformize(temp);
> > break;
> > @@ -1723,7 +1733,7 @@ vec4_visitor::nir_emit_texture(nir_tex_instr
*instr)
> >
> > /* Stuff the channel select bits in the top of the texture offset */
> > if (instr->op == nir_texop_tg4)
> > - constant_offset |= gather_channel(instr->component, sampler) <<
16;
> > + constant_offset |= gather_channel(instr->component, texture,
sampler) << 16;
> >
> > ir_texture_opcode op = ir_texture_opcode_for_nir_texop(instr->op);
> >
> > @@ -1736,7 +1746,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr
*instr)
> > shadow_comparitor,
> > lod, lod2, sample_index,
> > constant_offset, offset_value,
> > - mcs, is_cube_array, sampler, sampler_reg);
> > + mcs, is_cube_array,
> > + texture, texture_reg, sampler, sampler_reg);
> > }
> >
> > void
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> > index b8f90f2..5eb2f7b 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> > @@ -879,6 +879,8 @@ vec4_visitor::emit_texture(ir_texture_opcode op,
> > src_reg offset_value,
> > src_reg mcs,
> > bool is_cube_array,
> > + uint32_t surface,
> > + src_reg surface_reg,
> > uint32_t sampler,
> > src_reg sampler_reg)
> > {
> > @@ -937,7 +939,8 @@ vec4_visitor::emit_texture(ir_texture_opcode op,
> > inst->dst.writemask = WRITEMASK_XYZW;
> > inst->shadow_compare = shadow_comparitor.file != BAD_FILE;
> >
> > - inst->src[1] = sampler_reg;
> > + inst->src[1] = surface_reg;
> > + inst->src[2] = sampler_reg;
> >
> > /* MRF for the first parameter */
> > int param_base = inst->base_mrf + inst->header_size;
> > @@ -1054,7 +1057,7 @@ vec4_visitor::emit_texture(ir_texture_opcode op,
> > }
> >
> > if (devinfo->gen == 6 && op == ir_tg4) {
> > - emit_gen6_gather_wa(key_tex->gen6_gather_wa[sampler], inst->dst);
> > + emit_gen6_gather_wa(key_tex->gen6_gather_wa[surface], inst->dst);
> > }
> >
> > swizzle_result(op, dest,
> > @@ -1092,7 +1095,8 @@ vec4_visitor::emit_gen6_gather_wa(uint8_t wa,
dst_reg dst)
> > * Set up the gather channel based on the swizzle, for gather4.
> > */
> > uint32_t
> > -vec4_visitor::gather_channel(unsigned gather_component, uint32_t
sampler)
> > +vec4_visitor::gather_channel(unsigned gather_component,
> > + uint32_t surface, uint32_t sampler)
> > {
> > int swiz = GET_SWZ(key_tex->swizzles[sampler], gather_component);
> > switch (swiz) {
> > @@ -1101,7 +1105,7 @@ vec4_visitor::gather_channel(unsigned
gather_component, uint32_t sampler)
> > /* gather4 sampler is broken for green channel on RG32F --
> > * we must ask for blue instead.
> > */
> > - if (key_tex->gather_channel_quirk_mask & (1 << sampler))
> > + if (key_tex->gather_channel_quirk_mask & (1 << surface))
> > return 2;
> > return 1;
> > case SWIZZLE_Z: return 2;
> >
>
> It doesn't look like gather_channel actually needs both parameters,
> so maybe only pass in the surface/texture?
Well, gather_channel is gone now, so that's not as big a deal.
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