[Mesa-dev] [PATCH 10/10] vc4/nir: Use the new unified io intrinsics

[Jason Ekstrand]

Cc: Eric Anholt <eric at anholt.net>

---
 src/gallium/drivers/vc4/vc4_nir_lower_io.c | 20 ++++++++++++--------
 src/gallium/drivers/vc4/vc4_program.c      | 25 ++++++++++++++-----------
 2 files changed, 26 insertions(+), 19 deletions(-)

diff --git a/src/gallium/drivers/vc4/vc4_nir_lower_io.c b/src/gallium/drivers/vc4/vc4_nir_lower_io.c
index 1afe52a..88c47b7 100644
--- a/src/gallium/drivers/vc4/vc4_nir_lower_io.c
+++ b/src/gallium/drivers/vc4/vc4_nir_lower_io.c
@@ -355,7 +355,18 @@ vc4_nir_lower_uniform(struct vc4_compile *c, nir_builder *b,
                 intr_comp->num_components = 1;
                 nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, NULL);
 
-                if (intr->intrinsic == nir_intrinsic_load_uniform_indirect) {
+                nir_const_value *const_offset = nir_src_as_const_value(intr->src[0]);
+                if (const_offset) {
+                        /* We want a dword index for non-indirect uniform
+                         * loads.
+                         */
+                        intr_comp->const_index[0] = (intr->const_index[0] * 4 +
+                                                     i);
+                        intr_comp->src[0] =
+                                nir_src_for_ssa(nir_ishl(b,
+                                                         intr->src[0].ssa,
+                                                         nir_imm_int(b, 2)));
+                } else {
                         /* Convert the variable TGSI register index to a byte
                          * offset.
                          */
@@ -367,12 +378,6 @@ vc4_nir_lower_uniform(struct vc4_compile *c, nir_builder *b,
                         /* Convert the offset to be a byte index, too. */
                         intr_comp->const_index[0] = (intr->const_index[0] * 16 +
                                                      i * 4);
-                } else {
-                        /* We want a dword index for non-indirect uniform
-                         * loads.
-                         */
-                        intr_comp->const_index[0] = (intr->const_index[0] * 4 +
-                                                     i);
                 }
 
                 dests[i] = &intr_comp->dest.ssa;
@@ -404,7 +409,6 @@ vc4_nir_lower_io_instr(struct vc4_compile *c, nir_builder *b,
                 break;
 
         case nir_intrinsic_load_uniform:
-        case nir_intrinsic_load_uniform_indirect:
         case nir_intrinsic_load_user_clip_plane:
                 vc4_nir_lower_uniform(c, b, intr);
                 break;
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 197577b..3e86973 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1433,6 +1433,7 @@ static void
 ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr)
 {
         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
+        nir_const_value *const_offset;
         struct qreg *dest = NULL;
 
         if (info->has_dest) {
@@ -1442,21 +1443,23 @@ ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr)
         switch (instr->intrinsic) {
         case nir_intrinsic_load_uniform:
                 assert(instr->num_components == 1);
-                if (instr->const_index[0] < VC4_NIR_STATE_UNIFORM_OFFSET) {
-                        *dest = qir_uniform(c, QUNIFORM_UNIFORM,
-                                            instr->const_index[0]);
+                const_offset = nir_src_as_const_value(instr->src[0]);
+                if (const_offset) {
+                        unsigned offset = const_offset->u[0] +
+                                          instr->const_index[0];
+                        if (offset < VC4_NIR_STATE_UNIFORM_OFFSET) {
+                                *dest = qir_uniform(c, QUNIFORM_UNIFORM,
+                                                    offset);
+                        } else {
+                                *dest = qir_uniform(c, offset -
+                                                    VC4_NIR_STATE_UNIFORM_OFFSET,
+                                                    0);
+                        }
                 } else {
-                        *dest = qir_uniform(c, instr->const_index[0] -
-                                            VC4_NIR_STATE_UNIFORM_OFFSET,
-                                            0);
+                        *dest = indirect_uniform_load(c, instr);
                 }
                 break;
 
-        case nir_intrinsic_load_uniform_indirect:
-                *dest = indirect_uniform_load(c, instr);
-
-                break;
-
         case nir_intrinsic_load_user_clip_plane:
                 *dest = qir_uniform(c, QUNIFORM_USER_CLIP_PLANE,
                                     instr->const_index[0]);
-- 
2.5.0.400.gff86faf