[Mesa-dev] [PATCH v2] i965: Increase BRW_MAX_UBO to 14.

[Jordan Justen]

Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

On 2015-11-30 17:37:38, Kenneth Graunke wrote:
> The NVIDIA binary driver and Intel's closed source driver both expose
> 14 here, rather than the GL minimum of 12.  Let's follow suit.
> 
> Without this, Shadow of Mordor fails to render correctly and triggers
> OpenGL errors:
> 
> Mesa: User error: GL_INVALID_VALUE in glBindBufferBase(index=68)
> Mesa: User error: GL_INVALID_VALUE in glUniformBlockBinding(block binding 68 >= 60)
> 
> There are 5 stages (VS, TCS, TES, GS, FS), and 12 * 5 = 60 is too small.
> 14 * 5 = 70 will work just fine.
> 
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> Acked-by: Matt Turner <mattst88 at gmail.com>
> ---
>  src/mesa/drivers/dri/i965/brw_context.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index 20eea3a..3e71dba 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -452,7 +452,7 @@ struct brw_ff_gs_prog_data {
>  #define BRW_MAX_DRAW_BUFFERS 8
>  
>  /** Max number of UBOs in a shader */
> -#define BRW_MAX_UBO 12
> +#define BRW_MAX_UBO 14
>  
>  /** Max number of SSBOs in a shader */
>  #define BRW_MAX_SSBO 12
> -- 
> 2.6.2
> 
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