[Mesa-dev] i965/cs: Enable barrier in MEDIA_INTERFACE_DESCRIPTOR

[Kristian Høgsberg]

Jordan Justen <jordan.l.justen at intel.com> writes:

> Enable barrier in MEDIA_INTERFACE_DESCRIPTOR if the program uses the
> barrier() GLSL function.
>
> On Ivy Bridge and Haswell, this allows the piglit test
> tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test
> to pass. On gen8, this enables a similar test with a local group size
> of 896 to pass.
>
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
>
> ---
> src/mesa/drivers/dri/i965/brw_context.h  | 1 +
>  src/mesa/drivers/dri/i965/brw_cs.cpp     | 4 +++-
>  src/mesa/drivers/dri/i965/brw_defines.h  | 2 ++
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 ++
>  4 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index cd43ac5..883c75c 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -441,6 +441,7 @@ struct brw_cs_prog_data {
>     GLuint dispatch_grf_start_reg_16;
>     unsigned local_size[3];
>     unsigned simd_size;
> +   bool uses_barrier;
>  };
>  
>  /**
> diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp b/src/mesa/drivers/dri/i965/brw_cs.cpp
> index 29ee75b..4ff012a 100644
> --- a/src/mesa/drivers/dri/i965/brw_cs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_cs.cpp
> @@ -384,7 +384,9 @@ brw_upload_cs_state(struct brw_context *brw)
>        SET_FIELD(threads, GEN8_MEDIA_GPGPU_THREAD_COUNT) :
>        SET_FIELD(threads, MEDIA_GPGPU_THREAD_COUNT);
>     assert(threads <= brw->max_cs_threads);
> -   desc[dw++] = media_threads;
> +   desc[dw++] =
> +      SET_FIELD(cs_prog_data->uses_barrier, MEDIA_BARRIER_ENABLE) |
> +      media_threads;
>  
>     BEGIN_BATCH(4);
>     OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD << 16 | (4 - 2));
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index f595366..95d74ba 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -2615,6 +2615,8 @@ enum brw_wm_barycentric_interp_mode {
>  
>  #define MEDIA_INTERFACE_DESCRIPTOR_LOAD         0x7002
>  /* GEN7 DW5, GEN8+ DW6 */
> +# define MEDIA_BARRIER_ENABLE_SHIFT             21
> +# define MEDIA_BARRIER_ENABLE_MASK              INTEL_MASK(21, 21)
>  # define MEDIA_GPGPU_THREAD_COUNT_SHIFT         0
>  # define MEDIA_GPGPU_THREAD_COUNT_MASK          INTEL_MASK(7, 0)
>  # define GEN8_MEDIA_GPGPU_THREAD_COUNT_SHIFT    0
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index e922a85..5549a2d 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -1575,7 +1575,9 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
>     }
>  
>     case nir_intrinsic_barrier:
> +      assert(stage == MESA_SHADER_COMPUTE);
>        emit_barrier();
> +      ((struct brw_cs_prog_data *) prog_data)->uses_barrier = true;
>        break;

We can get a barrier in tess control shaders too - how about

    if (stage == MESA_SHADER_COMPUTE)
       ((struct brw_cs_prog_data *) prog_data)->uses_barrier = true;

instead?

With that change,

Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>