[Mesa-dev] [PATCH 05/11] freedreno/ir3: switch to shader_enums.h interp constants
Rob Clark
robdclark at gmail.com
Sun Sep 13 08:51:52 PDT 2015
From: Rob Clark <robclark at freedesktop.org>
A small step towards un-TGSI'ifying ir3.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
---
src/gallium/drivers/freedreno/a3xx/fd3_program.c | 5 ++-
src/gallium/drivers/freedreno/a4xx/fd4_program.c | 5 ++-
.../drivers/freedreno/ir3/ir3_compiler_nir.c | 40 +++++-----------------
src/gallium/drivers/freedreno/ir3/ir3_shader.h | 11 +++---
4 files changed, 20 insertions(+), 41 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index b536079..ef8a849 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -394,7 +394,6 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
/* figure out VARYING_INTERP / FLAT_SHAD register values: */
for (j = -1; (j = ir3_next_varying(fp, j)) < (int)fp->inputs_count; ) {
- uint32_t interp = fp->inputs[j].interpolate;
/* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG
* instead.. rather than -8 everywhere else..
@@ -406,8 +405,8 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
*/
debug_assert((inloc % 4) == 0);
- if ((interp == TGSI_INTERPOLATE_CONSTANT) ||
- ((interp == TGSI_INTERPOLATE_COLOR) && emit->rasterflat)) {
+ if ((fp->inputs[j].interpolate == INTERP_QUALIFIER_FLAT) ||
+ (fp->inputs[j].rasterflat && emit->rasterflat)) {
uint32_t loc = inloc;
for (i = 0; i < 4; i++, loc++) {
vinterp[loc / 16] |= FLAT << ((loc % 16) * 2);
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_program.c b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
index a3d7123..619eb86 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
@@ -492,7 +492,6 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit,
*/
/* figure out VARYING_INTERP / VARYING_PS_REPL register values: */
for (j = -1; (j = ir3_next_varying(s[FS].v, j)) < (int)s[FS].v->inputs_count; ) {
- uint32_t interp = s[FS].v->inputs[j].interpolate;
/* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG
* instead.. rather than -8 everywhere else..
@@ -504,8 +503,8 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit,
*/
debug_assert((inloc % 4) == 0);
- if ((interp == TGSI_INTERPOLATE_CONSTANT) ||
- ((interp == TGSI_INTERPOLATE_COLOR) && emit->rasterflat)) {
+ if ((s[FS].v->inputs[j].interpolate == INTERP_QUALIFIER_FLAT) ||
+ (s[FS].v->inputs[j].rasterflat && emit->rasterflat)) {
uint32_t loc = inloc;
for (i = 0; i < 4; i++, loc++) {
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index db930d4..7b25f84 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -1359,7 +1359,7 @@ static void add_sysval_input(struct ir3_compile *ctx, unsigned name,
so->inputs[n].semantic = ir3_semantic_name(name, 0);
so->inputs[n].compmask = 1;
so->inputs[n].regid = r;
- so->inputs[n].interpolate = TGSI_INTERPOLATE_CONSTANT;
+ so->inputs[n].interpolate = INTERP_QUALIFIER_FLAT;
so->total_in++;
ctx->ir->ninputs = MAX2(ctx->ir->ninputs, r + 1);
@@ -2141,23 +2141,9 @@ setup_input(struct ir3_compile *ctx, nir_variable *in)
so->inputs[n].compmask = (1 << ncomp) - 1;
so->inputs[n].inloc = ctx->next_inloc;
- so->inputs[n].interpolate = 0;
+ so->inputs[n].interpolate = INTERP_QUALIFIER_NONE;
so->inputs_count = MAX2(so->inputs_count, n + 1);
-
- /* the fdN_program_emit() code expects tgsi consts here, so map
- * things back to tgsi for now:
- */
- switch (in->data.interpolation) {
- case INTERP_QUALIFIER_FLAT:
- so->inputs[n].interpolate = TGSI_INTERPOLATE_CONSTANT;
- break;
- case INTERP_QUALIFIER_NOPERSPECTIVE:
- so->inputs[n].interpolate = TGSI_INTERPOLATE_LINEAR;
- break;
- case INTERP_QUALIFIER_SMOOTH:
- so->inputs[n].interpolate = TGSI_INTERPOLATE_PERSPECTIVE;
- break;
- }
+ so->inputs[n].interpolate = in->data.interpolation;
if (ctx->so->type == SHADER_FRAGMENT) {
unsigned semantic_name, semantic_index;
@@ -2183,27 +2169,19 @@ setup_input(struct ir3_compile *ctx, nir_variable *in)
} else {
bool use_ldlv = false;
- /* with NIR, we need to infer TGSI_INTERPOLATE_COLOR
- * from the semantic name:
+ /* detect the special case for front/back colors where
+ * we need to do flat vs smooth shading depending on
+ * rast state:
*/
if ((in->data.interpolation == INTERP_QUALIFIER_NONE) &&
((semantic_name == TGSI_SEMANTIC_COLOR) ||
(semantic_name == TGSI_SEMANTIC_BCOLOR)))
- so->inputs[n].interpolate = TGSI_INTERPOLATE_COLOR;
+ so->inputs[n].rasterflat = true;
if (ctx->flat_bypass) {
- /* with NIR, we need to infer TGSI_INTERPOLATE_COLOR
- * from the semantic name:
- */
- switch (so->inputs[n].interpolate) {
- case TGSI_INTERPOLATE_COLOR:
- if (!ctx->so->key.rasterflat)
- break;
- /* fallthrough */
- case TGSI_INTERPOLATE_CONSTANT:
+ if ((so->inputs[n].interpolate == INTERP_QUALIFIER_FLAT) ||
+ (so->inputs[n].rasterflat && ctx->so->key.rasterflat))
use_ldlv = true;
- break;
- }
}
so->inputs[n].bary = true;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
index 1bbbdbd..13b3f6a 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
@@ -30,6 +30,7 @@
#define IR3_SHADER_H_
#include "pipe/p_state.h"
+#include "glsl/shader_enums.h"
#include "ir3.h"
#include "disasm.h"
@@ -82,8 +83,8 @@ struct ir3_shader_key {
*/
unsigned color_two_side : 1;
unsigned half_precision : 1;
- /* used when shader needs to handle flat varyings (a4xx),
- * for TGSI_INTERPOLATE_COLOR:
+ /* used when shader needs to handle flat varyings (a4xx)
+ * for front/back color inputs to frag shader:
*/
unsigned rasterflat : 1;
};
@@ -174,8 +175,10 @@ struct ir3_shader_variant {
* spots where inloc is used.
*/
uint8_t inloc;
- uint8_t bary;
- uint8_t interpolate;
+ /* fragment shader specfic: */
+ bool bary : 1; /* fetched varying (vs one loaded into reg) */
+ bool rasterflat : 1; /* special handling for emit->rasterflat */
+ enum glsl_interp_qualifier interpolate;
} inputs[16 + 2]; /* +POSITION +FACE */
unsigned total_in; /* sum of inputs (scalar) */
--
2.4.3
More information about the mesa-dev
mailing list