[Mesa-dev] [PATCH 0/3] Make pull constant loads in gen6 start at MRFs 16/17

Iago Toral Quiroga itoral at igalia.com
Tue Sep 22 05:00:56 PDT 2015


Originally, these could conflict with our spills, but now that we moved the
latter to MRFs 21..23, that is no longer the case. Still, in gen6 we
now use MRFs 1..15 for URB writes, so we probably want to make our pull
constant loads out of that MRF space (currently, they start at MRFs 13/14).

Even if we do not want to do this for some reason, I still think we should
at least apply the first patch, since that plugs a hardcoded array size of
16 MRF registers. For some reason this only became a problem when I tried
to move pull constant loads to MRFs > 15 and not when I did the same for
spills, but it looks like the right thing to do in any case.

I tested this on SandyBridge and IvyBridge and did not observe any
regressions in piglit.

Iago Toral Quiroga (3):
  i965: Fix remove_duplicate_mrf_writes so it can handle 24 MRFs in gen6
  i965: make pull constant loads in gen6 start at MRFs 16/17
  i965: Define FIRST_SPILL_MRF and FIRST_PULL_LOAD_MRF only once and in
    one place

 src/mesa/drivers/dri/i965/brw_fs.cpp              | 6 +++---
 src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 --
 src/mesa/drivers/dri/i965/brw_inst.h              | 6 ++++++
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp    | 4 +---
 4 files changed, 10 insertions(+), 8 deletions(-)

-- 
1.9.1



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