[Mesa-dev] [PATCH 5/8] radeonsi: Invalidate the L2 cache on framebuffer change.

[Bas Nieuwenhuizen]

On Thursday, September 24, 2015 02:22:23 AM Marek Olšák wrote:
> On Fri, Sep 4, 2015 at 9:47 PM, Bas Nieuwenhuizen
> 
> <bas at basnieuwenhuizen.nl> wrote:
> > This is needed by DCC when using compressed textures.
> > 
> > Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
> > ---
> > 
> >  src/gallium/drivers/radeonsi/si_state.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/src/gallium/drivers/radeonsi/si_state.c
> > b/src/gallium/drivers/radeonsi/si_state.c index 5c9c866..3e11922 100644
> > --- a/src/gallium/drivers/radeonsi/si_state.c
> > +++ b/src/gallium/drivers/radeonsi/si_state.c
> > @@ -2114,6 +2114,8 @@ static void si_set_framebuffer_state(struct
> > pipe_context *ctx,> 
> >          */
> >         
> >         sctx->b.flags |= SI_CONTEXT_INV_TC_L1 |
> >         
> >                          SI_CONTEXT_INV_TC_L2 |
> > 
> > +                        SI_CONTEXT_PS_PARTIAL_FLUSH |
> > +                        SI_CONTEXT_FLUSH_WITH_INV_L2 |
> 
> This may work, but I think it does too much.
> 
> The only hardware requirement I know of is that
> CACHE_FLUSH_AND_INV_EVENT must be emitted before and after
> DCC_DECOMPRESS. Is there any case where this is not sufficient?
> 
> Marek

Changing how the fast clear(i.e. moving away from the CMASK) works seems to 
remove the need for SI_CONTEXT_PS_PARTIAL_FLUSH, so I am going to retest what 
cache flushes are actually needed. 

Bas