[Mesa-dev] [PATCH] i965/cs: Upload UBO/SSBO surfaces

Samuel Iglesias Gonsálvez siglesias at igalia.com
Wed Sep 30 01:15:56 PDT 2015


Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>

On 30/09/15 02:12, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_context.h          |  2 +-
>  src/mesa/drivers/dri/i965/brw_state.h            |  1 +
>  src/mesa/drivers/dri/i965/brw_state_upload.c     |  2 ++
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 26 ++++++++++++++++++++++++
>  4 files changed, 30 insertions(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index 80e5b74..ea7ea42 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1549,7 +1549,7 @@ struct brw_context
>  
>     int num_atoms[BRW_NUM_PIPELINES];
>     const struct brw_tracked_state render_atoms[60];
> -   const struct brw_tracked_state compute_atoms[7];
> +   const struct brw_tracked_state compute_atoms[8];
>  
>     /* If (INTEL_DEBUG & DEBUG_BATCH) */
>     struct {
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
> index 3b7a433..dc2b941 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -87,6 +87,7 @@ extern const struct brw_tracked_state brw_vs_binding_table;
>  extern const struct brw_tracked_state brw_wm_ubo_surfaces;
>  extern const struct brw_tracked_state brw_wm_abo_surfaces;
>  extern const struct brw_tracked_state brw_wm_image_surfaces;
> +extern const struct brw_tracked_state brw_cs_ubo_surfaces;
>  extern const struct brw_tracked_state brw_cs_abo_surfaces;
>  extern const struct brw_tracked_state brw_cs_image_surfaces;
>  extern const struct brw_tracked_state brw_wm_unit;
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index 46687e3..79b8301 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -259,6 +259,7 @@ static const struct brw_tracked_state *gen7_compute_atoms[] =
>     &brw_state_base_address,
>     &brw_cs_image_surfaces,
>     &gen7_cs_push_constants,
> +   &brw_cs_ubo_surfaces,
>     &brw_cs_abo_surfaces,
>     &brw_texture_surfaces,
>     &brw_cs_work_groups_surface,
> @@ -352,6 +353,7 @@ static const struct brw_tracked_state *gen8_compute_atoms[] =
>     &gen8_state_base_address,
>     &brw_cs_image_surfaces,
>     &gen7_cs_push_constants,
> +   &brw_cs_ubo_surfaces,
>     &brw_cs_abo_surfaces,
>     &brw_texture_surfaces,
>     &brw_cs_work_groups_surface,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index c931696..4e70cae 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -1001,6 +1001,32 @@ const struct brw_tracked_state brw_wm_ubo_surfaces = {
>     .emit = brw_upload_wm_ubo_surfaces,
>  };
>  
> +static void
> +brw_upload_cs_ubo_surfaces(struct brw_context *brw)
> +{
> +   struct gl_context *ctx = &brw->ctx;
> +   /* _NEW_PROGRAM */
> +   struct gl_shader_program *prog =
> +      ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE];
> +
> +   if (!prog)
> +      return;
> +
> +   /* BRW_NEW_CS_PROG_DATA */
> +   brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE],
> +                           &brw->cs.base, &brw->cs.prog_data->base, true);
> +}
> +
> +const struct brw_tracked_state brw_cs_ubo_surfaces = {
> +   .dirty = {
> +      .mesa = _NEW_PROGRAM,
> +      .brw = BRW_NEW_BATCH |
> +             BRW_NEW_CS_PROG_DATA |
> +             BRW_NEW_UNIFORM_BUFFER,
> +   },
> +   .emit = brw_upload_cs_ubo_surfaces,
> +};
> +
>  void
>  brw_upload_abo_surfaces(struct brw_context *brw,
>  			struct gl_shader_program *prog,
> 


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