[Mesa-dev] [PATCH 20/20] radeonsi: enable TGSI support cap for compute shaders
Marek Olšák
maraeo at gmail.com
Tue Apr 5 11:34:23 UTC 2016
On Sat, Apr 2, 2016 at 3:11 PM, Bas Nieuwenhuizen
<bas at basnieuwenhuizen.nl> wrote:
> Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
> ---
> docs/GL3.txt | 4 ++--
> docs/relnotes/11.3.0.html | 1 +
> src/gallium/drivers/radeon/r600_pipe_common.c | 21 ++++++++++++++++-----
> src/gallium/drivers/radeonsi/si_pipe.c | 3 ++-
> 4 files changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/docs/GL3.txt b/docs/GL3.txt
> index 6bfbd09..6ea8d5c 100644
> --- a/docs/GL3.txt
> +++ b/docs/GL3.txt
> @@ -167,7 +167,7 @@ GL 4.3, GLSL 4.30:
> GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30)
> GL_ARB_ES3_compatibility DONE (all drivers that support GLSL 3.30)
> GL_ARB_clear_buffer_object DONE (all drivers)
> - GL_ARB_compute_shader DONE (i965)
> + GL_ARB_compute_shader DONE (i965, radeonsi)
> GL_ARB_copy_image DONE (i965, nv50, nvc0, r600, radeonsi)
> GL_KHR_debug DONE (all drivers)
> GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL)
> @@ -225,7 +225,7 @@ GL 4.5, GLSL 4.50:
> These are the extensions cherry-picked to make GLES 3.1
> GLES3.1, GLSL ES 3.1
> GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30)
> - GL_ARB_compute_shader DONE (i965)
> + GL_ARB_compute_shader DONE (i965, radeonsi)
> GL_ARB_draw_indirect DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe)
> GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL)
> GL_ARB_framebuffer_no_attachments DONE (i965)
> diff --git a/docs/relnotes/11.3.0.html b/docs/relnotes/11.3.0.html
> index c4e3f36..8624924 100644
> --- a/docs/relnotes/11.3.0.html
> +++ b/docs/relnotes/11.3.0.html
> @@ -44,6 +44,7 @@ Note: some of the new features are only available with certain drivers.
> </p>
>
> <ul>
> +<li>GL_ARB_compute_shader on radeonsi</li>
> <li>GL_ARB_internalformat_query2 on all drivers</li>
> <li>GL_ARB_shader_atomic_counters on radeonsi</li>
> <li>GL_ARB_shader_atomic_counter_ops on nvc0, radeonsi</li>
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
> index 32bd6e4..1ab69e8 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.c
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.c
> @@ -654,23 +654,34 @@ static int r600_get_compute_param(struct pipe_screen *screen,
> uint64_t *grid_size = ret;
> grid_size[0] = 65535;
> grid_size[1] = 65535;
> - grid_size[2] = 1;
> + grid_size[2] = 65536;
> }
> return 3 * sizeof(uint64_t) ;
>
> case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
> if (ret) {
> uint64_t *block_size = ret;
> - block_size[0] = 256;
> - block_size[1] = 256;
> - block_size[2] = 256;
> + if (rscreen->family > CHIP_ARUBA && HAVE_LLVM >= 0x309 &&
Please use rscreen->chip_family >= SI and below too.
> + ir_type == PIPE_SHADER_IR_TGSI) {
> + block_size[0] = 2048;
> + block_size[1] = 2048;
> + block_size[2] = 2048;
> + } else {
> + block_size[0] = 256;
> + block_size[1] = 256;
> + block_size[2] = 256;
> + }
> }
> return 3 * sizeof(uint64_t);
>
> case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
> if (ret) {
> uint64_t *max_threads_per_block = ret;
> - *max_threads_per_block = 256;
> + if (rscreen->family > CHIP_ARUBA && HAVE_LLVM >= 0x309 &&
> + ir_type == PIPE_SHADER_IR_TGSI)
> + *max_threads_per_block = 2048;
> + else
> + *max_threads_per_block = 256;
> }
> return sizeof(uint64_t);
>
Marek
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