[Mesa-dev] [RFC 07/24] nvc0: shift address with blocksize for image buffers
Ilia Mirkin
imirkin at alum.mit.edu
Wed Apr 13 20:24:03 UTC 2016
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
On Tue, Apr 12, 2016 at 7:56 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> This fixes a bunch of dEQP image buffers related tests.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
> src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> index d1240b4..45b663b 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
> @@ -866,6 +866,10 @@ nve4_set_surface_info(struct nouveau_pushbuf *push,
> #endif
>
> if (res->base.target == PIPE_BUFFER) {
> + unsigned blocksize = util_format_get_blocksize(view->format);
> +
> + address += view->u.buf.first_element * blocksize;
> +
> info[0] = address >> 8;
> info[2] = width - 1;
> info[2] |= (0xff & nve4_su_format_aux_map[view->format]) << 22;
> --
> 2.8.0
>
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