[Mesa-dev] [PATCH] radeonsi: set SLC for atomics and coherent ops on APUs

[Nicolai Hähnle]

On 14.04.2016 10:36, Nicolai Hähnle wrote:
> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
> ---
> Hi Michel,
>
> perhaps we have to set the SLC (system level coherent) bit for images and
> buffers that may be accessed via GTT. Could you give this patch a try?

This change may or may not be needed, but it is insufficient for fixing 
the problems on my Carrizo.

Cheers,
Nicolai

>
> Thanks,
> Nicolai
> ---
>   src/gallium/drivers/radeonsi/si_shader.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index c58467d..53e9adb 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -2939,7 +2939,11 @@ static void image_append_args(
>   			inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE) ?
>   			i1true : i1false; /* glc */
>   	}
> -	emit_data->args[emit_data->arg_count++] = i1false; /* slc */
> +	emit_data->args[emit_data->arg_count++] =
> +		!ctx->screen->b.info.has_dedicated_vram &&
> +		(atomic ||
> +		 (inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE))) ?
> +		i1true : i1false; /* slc */
>   }
>
>   /**
> @@ -2988,7 +2992,11 @@ static void buffer_append_args(
>   			inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE) ?
>   			i1true : i1false; /* glc */
>   	}
> -	emit_data->args[emit_data->arg_count++] = i1false; /* slc */
> +	emit_data->args[emit_data->arg_count++] =
> +		!ctx->screen->b.info.has_dedicated_vram &&
> +		(atomic ||
> +		 (inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE))) ?
> +		i1true : i1false; /* slc */
>   }
>
>   static void load_fetch_args(
>