[Mesa-dev] [PATCH 11/40] i965/blorp: Prepare sampling for gen9

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 444ba26..35ab9af 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -1629,6 +1629,11 @@ brw_blorp_blit_program::texel_fetch(struct brw_reg dst)
       SAMPLER_MESSAGE_ARG_U_INT,
       SAMPLER_MESSAGE_ARG_V_INT
    };
+   static const sampler_message_arg gen9_ld_args[3] = {
+      SAMPLER_MESSAGE_ARG_U_INT,
+      SAMPLER_MESSAGE_ARG_V_INT,
+      SAMPLER_MESSAGE_ARG_ZERO_INT /* LOD */
+   };
 
    switch (brw->gen) {
    case 6:
@@ -1657,8 +1662,13 @@ brw_blorp_blit_program::texel_fetch(struct brw_reg dst)
          break;
       case INTEL_MSAA_LAYOUT_NONE:
          assert(s_is_zero);
-         texture_lookup(dst, SHADER_OPCODE_TXF, gen7_ld_args,
-                        ARRAY_SIZE(gen7_ld_args));
+         if (brw->gen < 9) {
+            texture_lookup(dst, SHADER_OPCODE_TXF, gen7_ld_args,
+                           ARRAY_SIZE(gen7_ld_args));
+         } else {
+            texture_lookup(dst, SHADER_OPCODE_TXF, gen9_ld_args,
+                           ARRAY_SIZE(gen9_ld_args));
+         }
          break;
       }
       break;
-- 
2.5.5