[Mesa-dev] [PATCH 20/40] i965/blorp: Add support for disabling color blending

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.cpp  | 4 ++++
 src/mesa/drivers/dri/i965/brw_blorp.h    | 1 +
 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 5 +++++
 src/mesa/drivers/dri/i965/gen8_blorp.cpp | 9 +++++++++
 4 files changed, 19 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 1829623..618949c 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -170,6 +170,10 @@ brw_blorp_params::brw_blorp_params(unsigned num_varyings,
      num_draw_buffers(num_draw_buffers),
      num_layers(num_layers)
 {
+   color_write_disable[0] = false;
+   color_write_disable[1] = false;
+   color_write_disable[2] = false;
+   color_write_disable[3] = false;
 }
 
 extern "C" {
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index a291aff..ef92fdc 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -242,6 +242,7 @@ public:
    brw_blorp_surface_info dst;
    enum gen6_hiz_op hiz_op;
    unsigned fast_clear_op;
+   bool color_write_disable[4];
    bool use_wm_prog;
    brw_blorp_wm_push_constants wm_push_consts;
    const unsigned num_varyings;
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index d635962..cbb4355 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -260,6 +260,11 @@ gen6_blorp_emit_blend_state(struct brw_context *brw,
       blend[i].blend1.pre_blend_clamp_enable = 1;
       blend[i].blend1.post_blend_clamp_enable = 1;
       blend[i].blend1.clamp_range = BRW_RENDERTARGET_CLAMPRANGE_FORMAT;
+
+      blend[i].blend1.write_disable_r = params->color_write_disable[0];
+      blend[i].blend1.write_disable_g = params->color_write_disable[1];
+      blend[i].blend1.write_disable_b = params->color_write_disable[2];
+      blend[i].blend1.write_disable_a = params->color_write_disable[3];
    }
 
    return cc_blend_state_offset;
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.cpp b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
index 1dea5bc..9740210 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
@@ -138,6 +138,15 @@ gen8_blorp_emit_blend_state(struct brw_context *brw,
    memset(blend, 0, size);
 
    for (unsigned i = 0; i < params->num_draw_buffers; ++i) {
+      if (params->color_write_disable[0])
+         blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_RED;
+      if (params->color_write_disable[1])
+         blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_GREEN;
+      if (params->color_write_disable[2])
+         blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_BLUE;
+      if (params->color_write_disable[3])
+         blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_ALPHA;
+
       blend[1 + 2 * i + 1] = GEN8_BLEND_PRE_BLEND_COLOR_CLAMP_ENABLE |
                              GEN8_BLEND_POST_BLEND_COLOR_CLAMP_ENABLE |
                              GEN8_BLEND_COLOR_CLAMP_RANGE_RTFORMAT;
-- 
2.5.5