[Mesa-dev] [PATCH 01/40] i965/gen9: Use correct size for DS_STATE

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/gen8_ds_state.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_ds_state.c b/src/mesa/drivers/dri/i965/gen8_ds_state.c
index d91eb77..976e3cc 100644
--- a/src/mesa/drivers/dri/i965/gen8_ds_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ds_state.c
@@ -38,10 +38,11 @@ gen8_upload_ds_state(struct brw_context *brw)
    const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data;
    const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base;
    const struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
+   const int ds_pkt_len = brw->gen >= 9 ? 11 : 9;
 
    if (active) {
-      BEGIN_BATCH(9);
-      OUT_BATCH(_3DSTATE_DS << 16 | (9 - 2));
+      BEGIN_BATCH(ds_pkt_len);
+      OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2));
       OUT_BATCH(stage_state->prog_offset);
       OUT_BATCH(0);
       OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4),
@@ -70,10 +71,16 @@ gen8_upload_ds_state(struct brw_context *brw)
                  GEN7_DS_COMPUTE_W_COORDINATE_ENABLE : 0));
       OUT_BATCH(SET_FIELD(ctx->Transform.ClipPlanesEnabled,
                           GEN8_DS_USER_CLIP_DISTANCE));
+
+      if (brw->gen >= 9) {
+         OUT_BATCH(0);
+         OUT_BATCH(0);
+      }
+
       ADVANCE_BATCH();
    } else {
-      BEGIN_BATCH(9);
-      OUT_BATCH(_3DSTATE_DS << 16 | (9 - 2));
+      BEGIN_BATCH(ds_pkt_len);
+      OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2));
       OUT_BATCH(0);
       OUT_BATCH(0);
       OUT_BATCH(0);
@@ -82,8 +89,15 @@ gen8_upload_ds_state(struct brw_context *brw)
       OUT_BATCH(0);
       OUT_BATCH(0);
       OUT_BATCH(0);
+
+      if (brw->gen >= 9) {
+         OUT_BATCH(0);
+         OUT_BATCH(0);
+      }
+
       ADVANCE_BATCH();
    }
+
    brw->tes.enabled = active;
 }
 
-- 
2.5.5