[Mesa-dev] [PATCH 32/40] i965/blorp/gen7: Prepare blorp being the very first renderer

[Topi Pohjolainen]

I noticed using one synthetic benchmark a sequence where hiz depth
operations are run first followed by a color buffer clear. In such
case there is a difference between blorp and meta clear where meta
configures L3 but blorp doesn't. I didn't see any problems in
practise without the configure but this is the right thing to do.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index ef96ec5..b85a6a5 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -802,6 +802,7 @@ gen7_blorp_exec(struct brw_context *brw,
                                  params->dst.num_samples > 1 ?
                                  (1 << params->dst.num_samples) - 1 : 1);
    gen6_blorp_emit_state_base_address(brw, params);
+   gen7_l3_state.emit(brw);
    gen6_blorp_emit_vertices(brw, params);
    gen7_blorp_emit_urb_config(brw);
    if (params->use_wm_prog) {
-- 
2.5.5