[Mesa-dev] [PATCH 1/4] radeonsi: use CE suballocator for CP DMA realignment.

Bas Nieuwenhuizen bas at basnieuwenhuizen.nl
Tue Apr 19 23:29:00 UTC 2016


I retract patch 1 and 2. Large scratch buffers are nice, but the
hardware only supports a 32-bit offset into it.

- Bas

On Wed, Apr 20, 2016 at 12:50 AM, Bas Nieuwenhuizen
<bas at basnieuwenhuizen.nl> wrote:
> Use the CE suballocator instead of the normal one as the usage
> is most similar to the CE, i.e. only read and written on GPU
> and not mapped to CPU.
>
> Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
> ---
>  src/gallium/drivers/radeonsi/si_cp_dma.c | 27 ++++++++++-----------------
>  1 file changed, 10 insertions(+), 17 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
> index 38e0ee6..264789d 100644
> --- a/src/gallium/drivers/radeonsi/si_cp_dma.c
> +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
> @@ -222,31 +222,24 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
>   */
>  static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size)
>  {
> +
>         uint64_t va;
>         unsigned dma_flags = 0;
>         unsigned scratch_size = CP_DMA_ALIGNMENT * 2;
> +       unsigned offset;
> +       struct r600_resource *tmp_buf;
>
>         assert(size < CP_DMA_ALIGNMENT);
>
> -       /* Use the scratch buffer as the dummy buffer. The 3D engine should be
> -        * idle at this point.
> -        */
> -       if (!sctx->scratch_buffer ||
> -           sctx->scratch_buffer->b.b.width0 < scratch_size) {
> -               r600_resource_reference(&sctx->scratch_buffer, NULL);
> -               sctx->scratch_buffer =
> -                       si_resource_create_custom(&sctx->screen->b.b,
> -                                                 PIPE_USAGE_DEFAULT,
> -                                                 scratch_size);
> -               if (!sctx->scratch_buffer)
> -                       return;
> -               sctx->emit_scratch_reloc = true;
> -       }
> +       u_suballocator_alloc(sctx->ce_suballocator, scratch_size, &offset,
> +                            (struct pipe_resource**)&tmp_buf);
> +       if (!tmp_buf)
> +               return;
>
> -       si_cp_dma_prepare(sctx, &sctx->scratch_buffer->b.b,
> -                         &sctx->scratch_buffer->b.b, size, size, &dma_flags);
> +       si_cp_dma_prepare(sctx, &tmp_buf->b.b,
> +                         &tmp_buf->b.b, size, size, &dma_flags);
>
> -       va = sctx->scratch_buffer->gpu_address;
> +       va = tmp_buf->gpu_address + offset;
>         si_emit_cp_dma_copy_buffer(sctx, va, va + CP_DMA_ALIGNMENT, size,
>                                    dma_flags);
>  }
> --
> 2.8.0
>


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