[Mesa-dev] [PATCH 1/4] radeonsi: use CE suballocator for CP DMA realignment.

Marek Olšák maraeo at gmail.com
Wed Apr 20 11:04:27 UTC 2016


On Wed, Apr 20, 2016 at 1:29 AM, Bas Nieuwenhuizen
<bas at basnieuwenhuizen.nl> wrote:
> I retract patch 1 and 2. Large scratch buffers are nice, but the
> hardware only supports a 32-bit offset into it.

You can still allocate a smaller scratch buffer. This should limit the
number of waves in hw. TMPRING_SIZE.WAVES should be adjusted
accordingly.

We can also decrease the size of scratch based on the max number of
waves with the given register and LDS usage. si_shader_dump_stats
calculates the max number of waves.

You just need to:
- set TMPRING_SIZE.WAVES = MIN2(32, max_simd_waves * 4)
- allocate scratch for TMPRING_SIZE.WAVES waves per CU (instead of 32)
- si_context::scratch_waves can be moved to si_shader in some form
(e.g. max_scratch_bytes_per_cu)

Marek


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