[Mesa-dev] [PATCH 4/7] gk110/ir: add emission for OP_SUEAU, OP_SUBFM and OP_SUCLAMP

[Samuel Pitoiset]

On 04/20/2016 10:35 PM, Ilia Mirkin wrote:
> On Wed, Apr 20, 2016 at 4:25 PM, Samuel Pitoiset
> <samuel.pitoiset at gmail.com> wrote:
>> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
>> ---
>>   .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 87 ++++++++++++++++++++++
>>   1 file changed, 87 insertions(+)
>>
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
>> index 56c28e8..15280df 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
>> @@ -137,6 +137,8 @@ private:
>>
>>      void emitSULDGB(const TexInstruction *);
>>      void emitSUSTGx(const TexInstruction *);
>> +   void emitSUCLAMPMode(uint16_t);
>> +   void emitSUCalc(Instruction *);
>>
>>      inline void defId(const ValueDef&, const int pos);
>>      inline void srcId(const ValueRef&, const int pos);
>> @@ -1594,6 +1596,86 @@ CodeEmitterGK110::emitSUSTGx(const TexInstruction *i)
>>   }
>>
>>   void
>> +CodeEmitterGK110::emitSUCLAMPMode(uint16_t subOp)
>> +{
>> +   uint8_t m;
>> +   switch (subOp & ~NV50_IR_SUBOP_SUCLAMP_2D) {
>> +   case NV50_IR_SUBOP_SUCLAMP_SD(0, 1): m = 0; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_SD(1, 1): m = 1; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_SD(2, 1): m = 2; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_SD(3, 1): m = 3; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_SD(4, 1): m = 4; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_PL(0, 1): m = 5; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_PL(1, 1): m = 6; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_PL(2, 1): m = 7; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_PL(3, 1): m = 8; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_PL(4, 1): m = 9; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_BL(0, 1): m = 10; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_BL(1, 1): m = 11; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_BL(2, 1): m = 12; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_BL(3, 1): m = 13; break;
>> +   case NV50_IR_SUBOP_SUCLAMP_BL(4, 1): m = 14; break;
>> +   default:
>> +      return;
>> +   }
>> +   code[1] |= m << 20;
>> +   if (subOp & NV50_IR_SUBOP_SUCLAMP_2D)
>> +      code[1] |= 1 << 24;
>> +}
>> +
>> +void
>> +CodeEmitterGK110::emitSUCalc(Instruction *i)
>> +{
>> +   ImmediateValue *imm = NULL;
>> +   uint64_t opc1, opc2;
>> +
>> +   if (i->srcExists(2)) {
>> +      imm = i->getSrc(2)->asImm();
>> +      if (imm)
>> +         i->setSrc(2, NULL); // special case, make emitForm_21 not assert
>
> oooof. i don't like this. please come up with a different way to
> handle this. the IR shouldn't be getting modified here, this could
> upset the sched calculations (not 100% sure when those happen
> exactly), etc.

Well, I don't really like this too, but it's loosely based on nvc0. Will 
try to find a better way for that.

Thanks for the whole review.

>
>> +   }
>> +
>> +   switch (i->op) {
>> +   case OP_SUCLAMP:  opc1 = 0xb00; opc2 = 0x580; break;
>> +   case OP_SUBFM:    opc1 = 0xb68; opc2 = 0x1e8; break;
>> +   case OP_SUEAU:    opc1 = 0xb6c; opc2 = 0x1ec; break;
>> +   default:
>> +      assert(0);
>> +      return;
>> +   }
>> +   emitForm_21(i, opc2, opc1);
>> +
>> +   if (i->op == OP_SUCLAMP) {
>> +      if (i->dType == TYPE_S32)
>> +         code[1] |= 1 << 19;
>> +      emitSUCLAMPMode(i->subOp);
>> +   }
>> +
>> +   if (i->op == OP_SUBFM && i->subOp == NV50_IR_SUBOP_SUBFM_3D)
>> +      code[1] |= 1 << 18;
>> +
>> +   if (i->op != OP_SUEAU) {
>> +      const uint8_t pos = i->op == OP_SUBFM ? 19 : 16;
>> +      if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
>> +         code[0] |= 255 << 2;
>> +         code[1] |= i->getDef(1)->reg.data.id << pos;
>> +      } else
>> +      if (i->defExists(1)) { // r, p
>> +         assert(i->def(1).getFile() == FILE_PREDICATE);
>> +         code[1] |= i->getDef(1)->reg.data.id << pos;
>> +      } else { // r, #
>> +         code[1] |= 7 << pos;
>> +      }
>> +   }
>> +
>> +   if (imm) {
>> +      assert(i->op == OP_SUCLAMP);
>> +      i->setSrc(2, imm);
>> +      code[1] |= (imm->reg.data.u32 & 0x3f) << 10; // sint6
>> +   }
>> +}
>> +
>> +void
>>   CodeEmitterGK110::emitAFETCH(const Instruction *i)
>>   {
>>      uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
>> @@ -2326,6 +2408,11 @@ CodeEmitterGK110::emitInstruction(Instruction *insn)
>>      case OP_SUSTP:
>>         emitSUSTGx(insn->asTex());
>>         break;
>> +   case OP_SUBFM:
>> +   case OP_SUCLAMP:
>> +   case OP_SUEAU:
>> +      emitSUCalc(insn);
>> +      break;
>>      case OP_PHI:
>>      case OP_UNION:
>>      case OP_CONSTRAINT:
>> --
>> 2.8.0
>>
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