[Mesa-dev] [PATCH 09/13] i965/blorp: Turn brw_blorp_params into a C-stlye struct
Jason Ekstrand
jason at jlekstrand.net
Fri Apr 22 23:19:16 UTC 2016
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 35 ++++++++--------------
src/mesa/drivers/dri/i965/brw_blorp.h | 43 +++++++++++++--------------
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 3 +-
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 6 ++--
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 42 +++++++++++++-------------
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 14 ++++-----
src/mesa/drivers/dri/i965/gen8_blorp.cpp | 14 ++++-----
7 files changed, 75 insertions(+), 82 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index cd37922..7d7790a 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -134,27 +134,17 @@ brw_blorp_compute_tile_offsets(const struct brw_blorp_surface_info *info,
}
-brw_blorp_params::brw_blorp_params()
- : x0(0),
- y0(0),
- x1(0),
- y1(0),
- depth_format(0),
- hiz_op(GEN6_HIZ_OP_NONE),
- fast_clear_op(0),
- num_varyings(0),
- num_draw_buffers(1),
- num_layers(1),
- wm_prog_kernel(BRW_BLORP_NO_WM_PROG),
- wm_prog_data(NULL)
+void
+brw_blorp_params_init(struct brw_blorp_params *params)
{
- memset(&src, 0, sizeof(src));
- memset(&dst, 0, sizeof(dst));
- memset(&depth, 0, sizeof(depth));
- color_write_disable[0] = false;
- color_write_disable[1] = false;
- color_write_disable[2] = false;
- color_write_disable[3] = false;
+ memset(params, 0, sizeof(*params));
+ params->hiz_op = GEN6_HIZ_OP_NONE;
+ params->fast_clear_op = 0;
+ params->num_varyings = 0;
+ params->num_draw_buffers = 1;
+ params->num_layers = 1;
+ params->wm_prog_kernel = BRW_BLORP_NO_WM_PROG;
+ params->wm_prog_data = NULL;
}
extern "C" {
@@ -201,7 +191,7 @@ intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
} /* extern "C" */
void
-brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params)
+brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params)
{
struct gl_context *ctx = &brw->ctx;
const uint32_t estimated_max_batch_usage = brw->gen >= 8 ? 1800 : 1500;
@@ -292,7 +282,8 @@ void
gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer, enum gen6_hiz_op op)
{
- brw_blorp_params params;
+ struct brw_blorp_params params;
+ brw_blorp_params_init(¶ms);
params.hiz_op = op;
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index ff36ff4..e9db063 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -219,11 +219,8 @@ struct brw_blorp_prog_data
#define BRW_BLORP_NO_WM_PROG 1
-class brw_blorp_params
+struct brw_blorp_params
{
-public:
- brw_blorp_params();
-
uint32_t x0;
uint32_t y0;
uint32_t x1;
@@ -235,10 +232,10 @@ public:
enum gen6_hiz_op hiz_op;
unsigned fast_clear_op;
bool color_write_disable[4];
- brw_blorp_wm_push_constants wm_push_consts;
- const unsigned num_varyings;
- const unsigned num_draw_buffers;
- const unsigned num_layers;
+ struct brw_blorp_wm_push_constants wm_push_consts;
+ unsigned num_varyings;
+ unsigned num_draw_buffers;
+ unsigned num_layers;
/**
* The pointer (relative to instruction state base address) to the WM/PS
@@ -249,9 +246,11 @@ public:
struct brw_blorp_prog_data *wm_prog_data;
};
+void
+brw_blorp_params_init(struct brw_blorp_params *params);
void
-brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params);
+brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
void
gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
@@ -259,14 +258,14 @@ gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
void
gen6_blorp_exec(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen7_blorp_exec(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
-gen8_blorp_exec(struct brw_context *brw, const brw_blorp_params *params);
+gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
struct brw_blorp_blit_prog_key
{
@@ -359,26 +358,26 @@ gen6_blorp_init(struct brw_context *brw);
void
gen6_blorp_emit_state_base_address(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen6_blorp_emit_vertices(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_blend_state(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_cc_state(struct brw_context *brw);
uint32_t
gen6_blorp_emit_wm_constants(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen6_blorp_emit_vs_disable(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_binding_table(struct brw_context *brw,
@@ -387,18 +386,18 @@ gen6_blorp_emit_binding_table(struct brw_context *brw,
uint32_t
gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen6_blorp_emit_gs_disable(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen6_blorp_emit_clip_disable(struct brw_context *brw);
void
gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_sampler_state(struct brw_context *brw,
@@ -431,7 +430,7 @@ gen7_blorp_emit_sampler_state_pointers_ps(struct brw_context *brw,
void
gen7_blorp_emit_clear_params(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen7_blorp_emit_constant_ps(struct brw_context *brw,
@@ -442,7 +441,7 @@ gen7_blorp_emit_constant_ps_disable(struct brw_context *brw);
void
gen7_blorp_emit_primitive(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
/** \} */
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 2da9368..e45b054 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -1896,7 +1896,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
if (!encode_srgb && _mesa_get_format_color_encoding(dst_format) == GL_SRGB)
dst_format = _mesa_get_srgb_format_linear(dst_format);
- brw_blorp_params params;
+ struct brw_blorp_params params;
+ brw_blorp_params_init(¶ms);
brw_blorp_surface_info_init(brw, ¶ms.src, src_mt, src_level,
src_layer, src_format, false);
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
index 3c97ad6..8ff6e43 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
@@ -208,7 +208,8 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
mesa_format format = irb->mt->format;
- brw_blorp_params params;
+ struct brw_blorp_params params;
+ brw_blorp_params_init(¶ms);
if (!encode_srgb && _mesa_get_format_color_encoding(format) == GL_SRGB)
format = _mesa_get_srgb_format_linear(format);
@@ -380,7 +381,8 @@ brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt)
const mesa_format format = _mesa_get_srgb_format_linear(mt->format);
- brw_blorp_params params;
+ struct brw_blorp_params params;
+ brw_blorp_params_init(¶ms);
brw_blorp_surface_info_init(brw, ¶ms.dst, mt,
0 /* level */, 0 /* layer */, format, true);
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index d4f271d..120ec1d 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -45,7 +45,7 @@
*/
void
gen6_blorp_emit_state_base_address(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint8_t mocs = brw->gen == 7 ? GEN7_MOCS_L3 : 0;
@@ -127,7 +127,7 @@ gen6_blorp_emit_vertex_buffer_state(struct brw_context *brw,
void
gen6_blorp_emit_vertices(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t vertex_offset;
@@ -236,7 +236,7 @@ gen6_blorp_emit_vertices(struct brw_context *brw,
*/
static void
gen6_blorp_emit_urb_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
BEGIN_BATCH(3);
OUT_BATCH(_3DSTATE_URB << 16 | (3 - 2));
@@ -249,7 +249,7 @@ gen6_blorp_emit_urb_config(struct brw_context *brw,
/* BLEND_STATE */
uint32_t
gen6_blorp_emit_blend_state(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t cc_blend_state_offset;
@@ -300,7 +300,7 @@ gen6_blorp_emit_cc_state(struct brw_context *brw)
*/
uint32_t
gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t depthstencil_offset;
@@ -335,7 +335,7 @@ gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
*/
static void
gen6_blorp_emit_cc_state_pointers(struct brw_context *brw,
- const brw_blorp_params *params,
+ const struct brw_blorp_params *params,
uint32_t cc_blend_state_offset,
uint32_t depthstencil_offset,
uint32_t cc_state_offset)
@@ -352,7 +352,7 @@ gen6_blorp_emit_cc_state_pointers(struct brw_context *brw,
/* WM push constants */
uint32_t
gen6_blorp_emit_wm_constants(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t wm_push_const_offset;
@@ -371,7 +371,7 @@ gen6_blorp_emit_wm_constants(struct brw_context *brw,
*/
static uint32_t
gen6_blorp_emit_surface_state(struct brw_context *brw,
- const brw_blorp_params *params,
+ const struct brw_blorp_params *params,
const struct brw_blorp_surface_info *surface,
uint32_t read_domains, uint32_t write_domain)
{
@@ -532,7 +532,7 @@ gen6_blorp_emit_sampler_state_pointers(struct brw_context *brw,
*/
void
gen6_blorp_emit_vs_disable(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
/* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State,
* 3DSTATE_VS, Dword 5.0 "VS Function Enable":
@@ -571,7 +571,7 @@ gen6_blorp_emit_vs_disable(struct brw_context *brw,
*/
void
gen6_blorp_emit_gs_disable(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
/* Disable all the constant buffers. */
BEGIN_BATCH(5);
@@ -641,7 +641,7 @@ gen6_blorp_emit_clip_disable(struct brw_context *brw)
*/
static void
gen6_blorp_emit_sf_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
BEGIN_BATCH(20);
OUT_BATCH(_3DSTATE_SF << 16 | (20 - 2));
@@ -662,7 +662,7 @@ gen6_blorp_emit_sf_config(struct brw_context *brw,
*/
static void
gen6_blorp_emit_wm_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
uint32_t dw2, dw4, dw5, dw6;
@@ -736,7 +736,7 @@ gen6_blorp_emit_wm_config(struct brw_context *brw,
static void
gen6_blorp_emit_constant_ps(struct brw_context *brw,
- const brw_blorp_params *params,
+ const struct brw_blorp_params *params,
uint32_t wm_push_const_offset)
{
/* Make sure the push constants fill an exact integer number of
@@ -761,7 +761,7 @@ gen6_blorp_emit_constant_ps(struct brw_context *brw,
static void
gen6_blorp_emit_constant_ps_disable(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
/* Disable the push constant buffers. */
BEGIN_BATCH(5);
@@ -793,7 +793,7 @@ gen6_blorp_emit_binding_table_pointers(struct brw_context *brw,
static void
gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t surfwidth, surfheight;
uint32_t surftype;
@@ -908,7 +908,7 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
static void
gen6_blorp_emit_depth_disable(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
brw_emit_depth_stall_flushes(brw);
@@ -945,7 +945,7 @@ gen6_blorp_emit_depth_disable(struct brw_context *brw,
*/
static void
gen6_blorp_emit_clear_params(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_CLEAR_PARAMS << 16 |
@@ -959,7 +959,7 @@ gen6_blorp_emit_clear_params(struct brw_context *brw,
/* 3DSTATE_DRAWING_RECTANGLE */
void
gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2));
@@ -973,7 +973,7 @@ gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
/* 3DSTATE_VIEWPORT_STATE_POINTERS */
void
gen6_blorp_emit_viewport_state(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
struct brw_cc_viewport *ccv;
uint32_t cc_vp_offset;
@@ -998,7 +998,7 @@ gen6_blorp_emit_viewport_state(struct brw_context *brw,
/* 3DPRIMITIVE */
static void
gen6_blorp_emit_primitive(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
BEGIN_BATCH(6);
OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
@@ -1023,7 +1023,7 @@ gen6_blorp_emit_primitive(struct brw_context *brw,
*/
void
gen6_blorp_exec(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t cc_blend_state_offset = 0;
uint32_t cc_state_offset = 0;
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 80545c2..36d90b7 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -407,7 +407,7 @@ gen7_blorp_emit_streamout_disable(struct brw_context *brw)
static void
gen7_blorp_emit_sf_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
/* 3DSTATE_SF
*
@@ -461,7 +461,7 @@ gen7_blorp_emit_sf_config(struct brw_context *brw,
*/
static void
gen7_blorp_emit_wm_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
uint32_t dw1 = 0, dw2 = 0;
@@ -523,7 +523,7 @@ gen7_blorp_emit_wm_config(struct brw_context *brw,
*/
static void
gen7_blorp_emit_ps_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
uint32_t dw2, dw4, dw5;
@@ -632,7 +632,7 @@ gen7_blorp_emit_constant_ps_disable(struct brw_context *brw)
static void
gen7_blorp_emit_depth_stencil_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
const uint8_t mocs = GEN7_MOCS_L3;
uint32_t surfwidth, surfheight;
@@ -767,7 +767,7 @@ gen7_blorp_emit_depth_disable(struct brw_context *brw)
*/
void
gen7_blorp_emit_clear_params(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
BEGIN_BATCH(3);
OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2));
@@ -780,7 +780,7 @@ gen7_blorp_emit_clear_params(struct brw_context *brw,
/* 3DPRIMITIVE */
void
gen7_blorp_emit_primitive(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
BEGIN_BATCH(7);
OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
@@ -800,7 +800,7 @@ gen7_blorp_emit_primitive(struct brw_context *brw,
*/
void
gen7_blorp_exec(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
if (brw->gen >= 8)
return;
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.cpp b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
index fd3bfa1..8e3eadc 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
@@ -126,7 +126,7 @@ gen8_blorp_emit_surface_state(struct brw_context *brw,
static uint32_t
gen8_blorp_emit_blend_state(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t blend_state_offset;
@@ -292,7 +292,7 @@ gen8_blorp_emit_raster_state(struct brw_context *brw)
static void
gen8_blorp_emit_sbe_state(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
/* 3DSTATE_SBE */
{
@@ -369,7 +369,7 @@ gen8_blorp_emit_wm_state(struct brw_context *brw)
*/
static void
gen8_blorp_emit_ps_config(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
uint32_t dw3, dw5, dw6, dw7;
@@ -429,7 +429,7 @@ gen8_blorp_emit_ps_blend(struct brw_context *brw)
static void
gen8_blorp_emit_ps_extra(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
uint32_t dw1 = 0;
@@ -530,7 +530,7 @@ gen8_blorp_emit_vf_state(struct brw_context *brw)
static void
gen8_blorp_emit_depth_stencil_state(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
const unsigned pkt_len = brw->gen >= 9 ? 4 : 3;
@@ -585,7 +585,7 @@ gen8_blorp_emit_constant_ps(struct brw_context *brw,
static uint32_t
gen8_blorp_emit_surface_states(struct brw_context *brw,
- const brw_blorp_params *params)
+ const struct brw_blorp_params *params)
{
uint32_t wm_surf_offset_renderbuffer;
uint32_t wm_surf_offset_texture = 0;
@@ -628,7 +628,7 @@ gen8_blorp_emit_surface_states(struct brw_context *brw,
* \copydoc gen6_blorp_exec()
*/
void
-gen8_blorp_exec(struct brw_context *brw, const brw_blorp_params *params)
+gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params)
{
uint32_t wm_bind_bo_offset = 0;
--
2.5.0.400.gff86faf
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