[Mesa-dev] [PATCH mesa v2] nouveau: codegen: combineLd/St do not combine indirect loads

[Hans de Goede]

Hi,

On 22-04-16 22:11, Ilia Mirkin wrote:
> Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>

Thanks, pushed.

What about the series to add swizzling suffix support for
the resource argument to LOAD ?

Regards,

Hans


>
> On Fri, Apr 22, 2016 at 7:07 AM, Hans de Goede <hdegoede at redhat.com> wrote:
>> combineLd/St would combine, i.e. :
>>
>> st  u32 # g[$r2+0x0] $r2
>> st  u32 # g[$r2+0x4] $r3
>>
>> into:
>>
>> st  u64 # g[$r2+0x0] $r2d
>>
>> But this is only valid if r2 contains an 8 byte aligned address,
>> which is not guaranteed for compute shaders
>>
>> This commit checks for src0 dim 0 not being indirect when combining
>> loads / stores as combining indirect loads / stores may break alignment
>> rules.
>>
>> Signed-off-by: Hans de Goede <hdegoede at redhat.com>
>> ---
>> Changes in v2:
>> -Only check for indirect loads/stores in the compute case
>> ---
>>   src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> index 6ec5fa5..9ce062e 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
>> @@ -2216,6 +2216,9 @@ MemoryOpt::combineLd(Record *rec, Instruction *ld)
>>      if (((size == 0x8) && (MIN2(offLd, offRc) & 0x7)) ||
>>          ((size == 0xc) && (MIN2(offLd, offRc) & 0xf)))
>>         return false;
>> +   // for compute indirect loads are not guaranteed to be aligned
>> +   if (prog->getType() == Program::TYPE_COMPUTE && rec->rel[0])
>> +      return false;
>>
>>      assert(sizeRc + sizeLd <= 16 && offRc != offLd);
>>
>> @@ -2268,8 +2271,12 @@ MemoryOpt::combineSt(Record *rec, Instruction *st)
>>      if (!prog->getTarget()->
>>          isAccessSupported(st->getSrc(0)->reg.file, typeOfSize(size)))
>>         return false;
>> +   // no unaligned stores
>>      if (size == 8 && MIN2(offRc, offSt) & 0x7)
>>         return false;
>> +   // for compute indirect stores are not guaranteed to be aligned
>> +   if (prog->getType() == Program::TYPE_COMPUTE && rec->rel[0])
>> +      return false;
>>
>>      st->takeExtraSources(0, extra); // save predicate and indirect address
>>
>> --
>> 2.7.3
>>