[Mesa-dev] [PATCH] nvc0: stick compute kernel arguments into uniform_bo
Hans de Goede
hdegoede at redhat.com
Tue Apr 26 10:15:41 UTC 2016
Hi,
On 25-04-16 23:54, Samuel Pitoiset wrote:
> Having one buffer object for input kernel arguments coming from clover
> and an other one for OpenGL user uniforms is unnecessary. Using the
> uniform_bo object for both GL/CL uniforms avoids to declare a new BO.
>
> This only affects compute programs but it should not hurt anything
> because the states are dirtied and date will get reuploaded.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Good to see this cleaned up and the patch looks good to me:
Reviewed-by: Hans de Goede <hdegoede at redhat.com>
Regards,
Hans
> ---
> src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 12 +++++-------
> src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 1 -
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 -
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 1 -
> src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 21 +++++----------------
> 5 files changed, 10 insertions(+), 26 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
> index 6aaa7ce..6e10179 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
> @@ -55,11 +55,6 @@ nvc0_screen_compute_setup(struct nvc0_screen *screen,
> return ret;
> }
>
> - ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 0, 1 << 12, NULL,
> - &screen->parm);
> - if (ret)
> - return ret;
> -
> BEGIN_NVC0(push, SUBC_CP(NV01_SUBCHAN_OBJECT), 1);
> PUSH_DATA (push, screen->compute->oclass);
>
> @@ -296,10 +291,13 @@ nvc0_compute_upload_input(struct nvc0_context *nvc0, const void *input)
> struct nvc0_program *cp = nvc0->compprog;
>
> if (cp->parm_size) {
> + struct nouveau_bo *bo = screen->uniform_bo;
> + const unsigned base = NVC0_CB_USR_INFO(5);
> +
> BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
> PUSH_DATA (push, align(cp->parm_size, 0x100));
> - PUSH_DATAh(push, screen->parm->offset);
> - PUSH_DATA (push, screen->parm->offset);
> + PUSH_DATAh(push, bo->offset + base);
> + PUSH_DATA (push, bo->offset + base);
> BEGIN_NVC0(push, NVC0_CP(CB_BIND), 1);
> PUSH_DATA (push, (0 << 8) | 1);
> /* NOTE: size is limited to 4 KiB, which is < NV04_PFIFO_MAX_PACKET_LEN */
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
> index fcb8289..e554a38 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
> @@ -405,7 +405,6 @@ nvc0_create(struct pipe_screen *pscreen, void *priv, unsigned ctxflags)
> BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->text);
> BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->uniform_bo);
> BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->txc);
> - BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->parm);
> }
>
> flags = NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RDWR;
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 3bf98ad..ea670a6 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -502,7 +502,6 @@ nvc0_screen_destroy(struct pipe_screen *pscreen)
> nouveau_bo_ref(NULL, &screen->txc);
> nouveau_bo_ref(NULL, &screen->fence.bo);
> nouveau_bo_ref(NULL, &screen->poly_cache);
> - nouveau_bo_ref(NULL, &screen->parm);
>
> nouveau_heap_destroy(&screen->lib_code);
> nouveau_heap_destroy(&screen->text_heap);
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
> index 0f78220..464ac3a 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
> @@ -64,7 +64,6 @@ struct nvc0_screen {
> int num_occlusion_queries_active;
>
> struct nouveau_bo *text;
> - struct nouveau_bo *parm; /* for COMPUTE */
> struct nouveau_bo *uniform_bo;
> struct nouveau_bo *tls;
> struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
> diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
> index 3d5f84d..85862d7 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
> @@ -69,11 +69,6 @@ nve4_screen_compute_setup(struct nvc0_screen *screen,
> return ret;
> }
>
> - ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 0, 1 << 12, NULL,
> - &screen->parm);
> - if (ret)
> - return ret;
> -
> BEGIN_NVC0(push, SUBC_CP(NV01_SUBCHAN_OBJECT), 1);
> PUSH_DATA (push, screen->compute->oclass);
>
> @@ -440,7 +435,6 @@ nve4_state_validate_cp(struct nvc0_context *nvc0, uint32_t mask)
>
> static void
> nve4_compute_upload_input(struct nvc0_context *nvc0,
> - struct nve4_cp_launch_desc *desc,
> const struct pipe_grid_info *info)
> {
> struct nvc0_screen *screen = nvc0->screen;
> @@ -452,19 +446,14 @@ nve4_compute_upload_input(struct nvc0_context *nvc0,
>
> if (cp->parm_size) {
> BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2);
> - PUSH_DATAh(push, screen->parm->offset);
> - PUSH_DATA (push, screen->parm->offset);
> + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5));
> + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5));
> BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2);
> PUSH_DATA (push, cp->parm_size);
> PUSH_DATA (push, 0x1);
> BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + (cp->parm_size / 4));
> PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1));
> PUSH_DATAp(push, info->input, cp->parm_size / 4);
> -
> - /* Bind user parameters coming from clover. */
> - /* TODO: This should be harmonized with uniform_bo. */
> - assert(!(desc->cb_mask & (1 << 0)));
> - nve4_cp_launch_desc_set_cb(desc, 0, screen->parm, 0, 1 << 12);
> }
> BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2);
> PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO);
> @@ -535,10 +524,10 @@ nve4_compute_setup_launch_desc(struct nvc0_context *nvc0,
> desc->gpr_alloc = cp->num_gprs;
> desc->bar_alloc = cp->num_barriers;
>
> - // Only bind OpenGL uniforms and the driver constant buffer through the
> + // Only bind user uniforms and the driver constant buffer through the
> // launch descriptor because UBOs are sticked to the driver cb to avoid the
> // limitation of 8 CBs.
> - if (nvc0->constbuf[5][0].user) {
> + if (nvc0->constbuf[5][0].user || cp->parm_size) {
> nve4_cp_launch_desc_set_cb(desc, 0, screen->uniform_bo,
> NVC0_CB_USR_INFO(5), 1 << 16);
> }
> @@ -585,7 +574,7 @@ nve4_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
>
> nve4_compute_setup_launch_desc(nvc0, desc, info);
>
> - nve4_compute_upload_input(nvc0, desc, info);
> + nve4_compute_upload_input(nvc0, info);
>
> #ifdef DEBUG
> if (debug_get_num_option("NV50_PROG_DEBUG", 0))
>
z
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