[Mesa-dev] [PATCH 00/15] Add ARB_vertex_attrib_64bit for i965 scalar (gen8+)
Antia Puentes
apuentes at igalia.com
Thu Apr 28 11:40:30 UTC 2016
Hello,
the following series adds the implementation for the ARB_vertex_attrib_64bit
extension on the i965 scalar backend (gen8+). It is the result of working on
https://bugs.freedesktop.org/show_bug.cgi?id=94442.
As this work depends on the ARB_gpu_shader_fp64 i965 functionality [1],
which is work in progress, the aim of sending the series now is to get
early feedback and parallelise the review process.
The series applies on top of the current version of the
https://github.com/Igalia/mesa/tree/i965-fp64 branch,
which contains the last fp64 work for gen8.
A frozen version of the fp64 branch + the series is available in our repo:
$ git clone -b i965-attrib64-v1 https://github.com/Igalia/mesa.git
[1] https://bugs.freedesktop.org/show_bug.cgi?id=92760
Alejandro PiƱeiro (6):
i965: get the proper vertex surface type for doubles on gen8+
i965: passthru formats cannot be used width edge flag enabled
i965/fs: half exec_size when dealing with 64 bits attributes
i965: Enable ARB_vertex_attrib_64bit for gen8+
docs: Mark ARB_vertex_attrib_64bit as done for i965
i965: Expose OpenGL 4.1 for gen8+
Antia Puentes (1):
i965: Configure how to store *64*PASSTHRU vertex components
Juan A. Suarez Romero (8):
i965/fs: shuffle 32bits into 64bits for doubles
nir: add double input bitmap
i965: take care of doubles when remapping VS attributes
i965/vec4: use attribute slots to calculate URB read length
i965/fs: calculate first non-payload GRF using attrib slots
i965: take care of doubles when lowering VS inputs
i965: abort linking if we exhaust the registers
i965: abort linking if URB read length greater than 15
docs/GL3.txt | 2 +-
src/compiler/nir/glsl_to_nir.cpp | 1 +
src/compiler/nir/nir.h | 2 ++
src/mesa/drivers/dri/i965/brw_compiler.h | 1 +
src/mesa/drivers/dri/i965/brw_draw_upload.c | 30 ++++++++++++++--
src/mesa/drivers/dri/i965/brw_fs.cpp | 44 +++++++++++++++++++++--
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 6 ++++
src/mesa/drivers/dri/i965/brw_nir.c | 29 +++++++--------
src/mesa/drivers/dri/i965/brw_shader.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4.cpp | 30 ++++++++++++++--
src/mesa/drivers/dri/i965/gen8_draw_upload.c | 54 ++++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/intel_extensions.c | 3 +-
src/mesa/drivers/dri/i965/intel_screen.c | 2 +-
13 files changed, 177 insertions(+), 28 deletions(-)
--
2.5.0
More information about the mesa-dev
mailing list