[Mesa-dev] [PATCH 8/9] radeonsi: fix some reported undefined left-shifts

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

One of these is an unsigned bitfield, which I suspect is a false positive, but
gcc 5.3.1 complains about it with -fsanitize=undefined.
---
 src/gallium/drivers/radeonsi/si_state.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 1dd468b..4ce8a50 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -613,7 +613,7 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
 			continue;
 
 		/* cb_render_state will disable unused ones */
-		blend->cb_target_mask |= state->rt[j].colormask << (4 * i);
+		blend->cb_target_mask |= (unsigned)state->rt[j].colormask << (4 * i);
 
 		if (!state->rt[j].blend_enable) {
 			si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
@@ -677,7 +677,7 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
 		}
 		si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
 
-		blend->blend_enable_4bit |= 0xf << (i * 4);
+		blend->blend_enable_4bit |= 0xfu << (i * 4);
 
 		/* This is only important for formats without alpha. */
 		if (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
@@ -686,7 +686,7 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
 		    dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
 		    srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
 		    dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA)
-			blend->need_src_alpha_4bit |= 0xf << (i * 4);
+			blend->need_src_alpha_4bit |= 0xfu << (i * 4);
 	}
 
 	if (blend->cb_target_mask) {
-- 
2.7.4